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Advanced Embedded

Systems

Assembly Language Programming

Handouts

The AVR Microcontroller and Embedded Systems using Assembly and C


by
M. A. Mazidi, S. Naimi and S. Naimi

1
Assembly Language Programming (Recap)
LDI Rd, k (Loading immediate values into registers, R16 to R31)

ADD Rd,Rs (Rd = Rd + Rs, d,s must be between 0 and 31)


SUB Rd,Rs (Rd = Rd - Rs, d,s must be between 0 and 31)
INC Rd (Rd = Rd + 1, d must be between 0 and 31)
DEC Rd (Rd = Rd - 1, d must be between 0 and 31)

STS K, Rd (Store to Data space, d b/w 0 & 31, K= $0000 to $FFFF)


OUT IOA, Rd (Out to I/O Location, d b/w 0 & 31, IOA=0 to 63 (3F))

LDS Rd, K (Load from Data space, d b/w 0 & 31, K=$0000 to $FFFF)
IN Rd, IOA (In from I/O Location, d b/w 0 & 31, IOA=0 to 63 (3F))

2
Few more important Instruction
MOV (To copy Data among GPR registers)
 Mov Rd, Rr

 Its equivalent in high level languages:


Rd = Rr , d must be between 0 and 31

3
Not all instructions affect the flags
Load instructions do not affect the flags

4
Assembler Directives
.ORG
 .ORG address

00 E205
01 0000
Program.asm 02 0000
03 0000
.ORG 0
04 0000
LDI R16, 0x25
assembler 05 0000
.ORG 0x7
06 0000
LDI R17, 0x34
07 E314
LDI R18, 0x31
08 E321
09 0000
0A 0000

5
Flash memory and PC register

 In AVR uCs, each flash memory location is 2 bytes wide.


 Atmega32 whose flash is 32 KB is organized as 16KB x 16.
 Its PC is 14 bit wide (214 = 16k memory locations)

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Flash memory and PC register
00 E205
.ORG 00 01 E314
LDI R16, 0x25 02 E321
E321
LDI R17, $34 03 0F01
0F01
LDI R18, 0x31
04 0F02
0F02
ADD R16, R17
ADD R16, R18 05 E01B
16-bit
E01B
LDI R17, 11 06 0F01
0F01
ADD R16, R17 07 9300
STS SUM, R16 9300
08 0300
HERE:JMP HERE 0300 RAM EEPROM Timers
09 940C
940C
0A 0009
PROGRAM
Flash0009
ROM ALU

PC: 3
0
9
1
5
2
A
7
4
8
B
6 Data
CPU Bus
Instruction dec.
Program
Bus

Interrupt Other
OSC Ports
Unit Peripherals

I/O
PINS

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Fetch and execute
Old Architectures
00 E205

01 E314
02 E321
Instruct 4
03 0F01
Instruct 3 04 0F02
Instruct 2 05 E01B
Instruct 1 16-bit
06 0F01
07 9300
08 0300
RAM EEPROM Timers
Fetch 09 940C
0A 0009
PROGRAM
Flash ROM ALU

PC: Data
CPU Bus
Execute
Instruction dec.
Program
Bus

Interrupt Other
OSC Ports
Unit Peripherals

I/O
PINS

8
Pipelining
Pipelining
00 E205

01 E314
02 E321
Instruct 4 03 0F01
Instruct 3 04 0F02

Instruct 2 05 E01B
16-bit
06 0F01
Instruct 1
07 9300
08 0300
RAM EEPROM Timers
09 940C
Fetch
0A 0009
PROGRAM
Flash ROM ALU

PC: Data
CPU Bus
Execute Program Instruction dec.

Bus

Interrupt Other
OSC Ports
Unit Peripherals

I/O
PINS

9
Assembler Directives
.EQU and .SET
 .EQU name = value
 Example:
.EQU COUNT = 0x25
LDI R21, COUNT ;R21 = 0x25
LDI R22, COUNT + 3 ;R22 = 0x28

 .SET name = value


 Example:
.SET COUNT = 0x25
LDI R21, COUNT ;R21 = 0x25
LDI R22, COUNT + 3 ;R22 = 0x28
.SET COUNT = 0x19
LDI R21, COUNT ;R21 = 0x19

10
Jump and Call
Stack
Calling a function

11
Execution of Program/Instructions
 CPU executes instructions
one after another.
1 void main ()
 For example in the following C 2 {
program, CPU first executes the 3 a = b + c;

instruction of line 3 (adds b and 4 c -= 2;


5 d = a + c;
c), then executes the instruction 6 }
of line 4.

12
Execution of Instructions
 But sometimes we need the CPU to execute,
an instruction other than the next
instruction.

 For example:
 When we use a conditional instruction
 When we make a loop
 When we call a function

13
In case of Conditional Instruction

Example 1:

Not executing the next 1 void main ()

instruction, because of 2
3
{
int a = 2;

condition. 4 int c = 3;
5 if (a == 8)
6 c = 6;
7 else
In the following example, the 8 c = 7;

instruction of line 6 is not executed. 9 c = a + 3;


}

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In case of Loop
Example 2:
In this example the next
instruction will not be
executed because of loop. 1
2
void main ()
{
3 int a, c = 0;
4 for(a = 2; a < 4; a++)
 The order of execution is as 5 c += a;

follows:
6 a = c + 2;
7 }
 Line 4 8
9
 Line 5
 Again, line 4
 Again line 5
 Line 6

15
In case of Function
Example 3:
Code
Not executing the next 1 void func1 ();

instruction, because of 2
3
void main ()
{
calling a function. 4 int a = 2, c = 3;
5 func1 ();
6 c = a + 3;

In the following example, the 7 }


8 void func1 (){
instruction of line 6 is not executed 9 int d = 5 / 2;

after line 5. 10 }
11

16
Jump and Call

17
17
Jump and Call
 In the assembly language, there are 2 groups of
instructions that make the CPU execute an
instruction other than the next instruction.

 The instructions are:


 Jump
 used for making loop and condition
 Call
 used for making function calls

18
Jump
Jump changes Program Counter (PC) and causes CPU
to execute an instruction other than next instruction.

There are 2 kinds of Jump instructions:


 Unconditional Jump
 When CPU executes an unconditional jump, it jumps
unconditionally (without checking any condition) to the
target location.
 Example: RJMP and JMP instructions

 Conditional Jump:
 When CPU executes a conditional jump, it checks a
condition, if the condition is true then it jumps to the
target location; otherwise, it executes the next instruction.

19
Unconditional Jump in AVR
Most commonly used unconditional
jump instructions in AVR: RJMP (2
bytes) and JMP (4 bytes)
Code

1 LDI R16, 0
2 LDI R17, 2
 Label the location where want to 3 L1:
L1: ADD R16, R17

jump, using a unique name, followed 4 RJMP L1


L1
5 SUB R10,R15
by ‘:’

 Then, mention the name of the label


with (in front of) the jump instruction

 This causes the CPU to jump to the


location we have labeled, instead of
executing the next instruction.

20
Ways of Specifying the Jump Target
 Most commonly ways to provide the jump address:
 PC = operand

 PC = PC + operand

21
JMP

In JMP, the operand,


contains the address of
the destination Address Code
PC: 0002
0001
0000
0007 0000 .ORG 0
 When an JMP is 0000 LDI R16, 15
executed: Machine code: 0001 LDI R17, 5
 PC is loaded with 940C 0006
0006 0002 JMP LBL_NAME
the operand opCode operand
0004 LDI R18, 4

value 0005 ADD R18, R17


0006 LBL_NAME:
0006
Machine code:
0006 ADD R16,R17
0007 JMP LBL_NAME
940C 0006
0006 0009
opCode operand

22
RJMP

 When RJMP is
PC: 0003
0002
0001
0000 Address Code
executed:
0000 .ORG 0
 The operand will 0005 0000 LDI R16, 15
be added to the Machine code: 0001 LDI R17, 5
current value of PC 002
C002 0002 RJMP LBL_NAME
opCode operand 0003 LDI R18, 4
0004 ADD R18, R17
0005 LBL_NAME:
0005
0005 ADD R16,R17
0006 RJMP LBL_NAME
0007

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Conditional Jump in AVR: Conditions and Loop
SREG: I T H S V N Z C
 The conditional jump instructions in AVR are as follows:
Instruction Abbreviation of Comment
BREQ lbl Branch if Equal Jump to location lbl if Z = 1,
BRNE lbl Branch if Not Equal Jump if Z = 0, to location lbl
BRCS lbl Branch if Carry Set Jump to location lbl, if C = 1
BRLO lbl Branch if Lower
BRCC lbl Branch if Carry Cleared Jump to location lbl, if C = 0
BRSH lbl Branch if Same or Higher
BRMI lbl Branch if Minus Jump to location lbl, if N = 1
BRPL lbl Branch if Plus Jump if N = 0
BRGE lbl Branch if Greater or Equal Jump if S = 0
BRLTlbl Branch if Less Than Jump if S = 1
BRHS lbl Branch if Half Carry Set If H = 1 then jump to lbl
BRHC lbl Branch if Half Carry Cleared if H = 0 then jump to lbl
BRTS Branch if T flag Set If T = 1 then jump to lbl
BRTC Branch if T flag Cleared If T = 0 then jump to lbl
BRIS Branch if I flag set If I = 1 then jump to lbl
BRIC Branch if I flag cleared If I = 0 then jump to lbl

24
Conditions
 When b is subtracted from a:
 The result is zero, when a is equal to b a
 Carry will be set when a < b -b
 Carry will stay clear when a > b

SREG: I T H S V N Z C

Instruction Abbreviation of Comment


BREQ lbl Branch if Equal Jump to location lbl if Z = 1,
BRNE lbl Branch if Not Equal Jump if Z = 0, to location lbl
BRCS lbl Branch if Carry Set Jump to location lbl, if C = 1
BRLO lbl Branch if Lower
BRCC lbl Branch if Carry Cleared Jump to location lbl, if C = 0
BRSH lbl Branch if Same or Higher

25
Example 1
 Write a program that if R20 is equal to R21
then R22 increases.

 Solution:
SUB R20,R21 ;Z will be set if R20 == R21
BRNE NEXT ;if Not Equal jump to next
INC R22
NEXT:

26
Example 2
 Write a program that if R26 < R24 then
R22 increases.

 Solution:
SUB R26,R24 ;C will be set when R26 < R24
BRCC L1
INC R22
L1:

27
Example 3
 Write a program that if R26 > R24 then
R22 increases.

 Solution:
SUB R26,R24 ;C will be cleared when R26 > R24
BRCS L1
INC R22
L1:

28
Problem
 Write a program that if R26 >= R24 then
R22 decreases and If R26 < R24 then
increases R22.

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Example 4: IF and ELSE
int main ( )
{
R17 = 5;
if (R26 < R24)
{ R22++; }
else
{ R22--; }
R17++;
}

LDI R17,5
SUB R26, R24
BRSH ELSE_LABEL
INC R22
JMP NEXT
ELSE_LABEL:
DEC R22
NEXT:
INC R17

30
Loop
 Write a program that executes the
instruction “ADD R30,R31” 9 times.

 Solution:
.ORG 00

LDI R16,9 ;R16 = 9

L1:
ADD R30,R31

DEC R16 ;R16 = R16 - 1


BRNE L1 ;if Z = 0

L2: RJMP L2 ;Wait here forever

31
Loop
 Write a program that calculates the result
of 4+4+4+…+4 (add 4 nine times)

 Solution:
.ORG 00

LDI R17, 0 ;R17 = 0


LDI R18, 4 ;R18 = 4

LDI R16, 9 ;R16 = 9

L1: ADD R17,R18 ;R17 = R17 + R16

DEC R16 ;R16 = R16 - 1


BRNE L1 ;if Z = 0
L2: RJMP L2 ;Wait here forever

32
Loop
 Write a program that calculates the result
of 9+8+7+…+1

 Solution:
.ORG 00
LDI R16, 9 ;R16 = 9
LDI R17, 0 ;R17 = 0
L1: ADD R17,R16 ;R17 = R17 + R16
DEC R16 ;R16 = R16 - 1
BRNE L1 ;if Z = 0
L2: RJMP L2 ;Wait here forever

33
Loop
 Write a program that calculates the result
of 20+19+18+17+…+1

 Solution:
.ORG 00
LDI R16, 20 ;R16 = 20
LDI R17, 0 ;R17 = 0
L1: ADD R17,R16 ;R17 = R17 + R16
DEC R16 ;R16 = R16 - 1
BRNE L1 ;if Z = 0
L2: RJMP L2 ;Wait here forever

34
Exercise
 Write a program to (a) clear R20, then (b) add 3 to
R20 ten times, and (c) send the sum to PORTB.

-----------------------------------------------------------

 Write a program to (a) load the PORTB register with


the value 0x55, and (b) complement Port B 70 times.
 Change program for repetition of 700 times
 Change program for repetition of 100,000 times

35
Call Topics
 Stack, Push and Pop
 Calling a function

36
Stack
 PUSH Rr  POP Rd
[SP] = Rr
SP = SP + 1
SP = SP - 1
Rd = [SP]

SP

Stack

37
Stack

Address Code
ORG 0

0000 LDI R16,HIGH(RAMEND)

0001 OUT SPH,R16


R20: $10
$00 R22: $30
$00
0002 LDI R16,LOW(RAMEND)

R21: $00
$20 R0: $00 0003 OUT SPL,R16
0004 LDI R20,0x10
0005 LDI R21, 0x20

0006 LDI R22,0x30


PUSH R20
SP 0000
0007
$10
0008 PUSH R21
$20
0009 PUSH R22
POP R21
$30
000A
000B POP R0

000C POP R20

000D L1: RJMP L1

Memory

38
Subroutine

39
Calling a Function and Returning Back

Address Code
 To execute a call:
0000
 Address of the next LDI R16,HIGH(RAMEND)
0001 OUT SPH,R16
instruction is saved 0002 LDI R16,LOW(RAMEND)
 PC is loaded with 0003 OUT SPL,R16

the appropriate 0004 LDI R20,15

value Machine code: 0005 LDI R21,5


0006 CALL FUNC_NAME
940E 000A
000A 0006
0008 INC R20
opCode operand 00 08
0009 L1: RJMP L1
000A FUNC_NAME:
000A ADD R20,R21
000B SUBI R20,3
SP 000C
Stack
PC: 000C
000B
0006
0005
0004
0009
0008
RET
000D

40
Stack
 PUSH Rr  POP Rd
[SP] = Rr
SP = SP + 1
SP = SP - 1
Rd = [SP]

SP

Stack

41
Stack

Address Code
ORG 0

0000 LDI R16,HIGH(RAMEND)

0001 OUT SPH,R16


R20: $10
$00 R22: $30
$00
0002 LDI R16,LOW(RAMEND)

R21: $00
$20 R0: $00 0003 OUT SPL,R16
0004 LDI R20,0x10
0005 LDI R21, 0x20

0006 LDI R22,0x30


PUSH R20
SP 0000
0007
$10
0008 PUSH R21
$20
0009 PUSH R22
POP R21
$30
000A
000B POP R0

000C POP R20

000D L1: RJMP L1

Memory

42
Subroutine

43
Calling a Function and Returning Back

Address Code
 To execute a call:
0000
 Address of the next LDI R16,HIGH(RAMEND)
0001 OUT SPH,R16
instruction is saved 0002 LDI R16,LOW(RAMEND)
 PC is loaded with 0003 OUT SPL,R16

the appropriate 0004 LDI R20,15

value Machine code: 0005 LDI R21,5


0006 CALL FUNC_NAME
940E 000A
000A 0006
0008 INC R20
opCode operand 00 08
0009 L1: RJMP L1
000A FUNC_NAME:
000A ADD R20,R21
000B SUBI R20,3
SP 000C
Stack
PC: 000C
000B
0006
0005
0004
0009
0008
RET
000D

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