Coappt

Subject: Computer Organization & Architecture
Semester: Jan-May 2019
Apex Institute of Technology- MBA

Apex Institute of Technology- CSE
COURSE OBJECTIVES:-
• To make students familiarize with the architecture of a

processor.
• To have a good Knowledge of various functional and control
units of computer system.
• To understand the design and each components of computer
system.

OBJECTIVES:-
• Introduction
• Architecture Models
• Control Buses
• Programming Languages
• Instruction Cycle
• Computer Memory Management

INTRODUCTION:
• Computer Architecture is a set of rules and methods that describes

the functionality,organization and implementation of computer
system.
• Program is a set of instructions that specify the operations,operands
and sequence by which processing has to occur.
• Instruction Code is a group of bits that tells the computer to
perform a specific operation.

BLOCK DIAGRAM OF DIGITAL COMPUTER

VON-NEUMANN ARCHITECTURE
 Named after mathematician John Von Neumann.
 Design model for stored program digital computer.
 Also Known as Von-Neumann model.
 Uses a processing unit and a single separate storage structure

to hold both instructions and data.

Contt….

Contt….
 One shared memory for instructions and data.
 One data bus and one address bus between processor and
memory.
 Instructions and data have to be fetched in sequential order.

Contt…
Output
devices

Contt….
CPU
 Contains ALU, CU and a variety of registers.
REGISTERS
 High speed storage areas in the CPU.
ALU
 The ALU allows arithmetic (add, subtract etc) and logic
(AND, OR, NOT etc) operations to be carried out.
CU
 Controls the operation of the computer’s ALU, memory and
input/output devices.

HARVARD ARCHITECTURE
Computer architecture with physically separate storage and

signal pathways for instructions and data.
Distinct code and data address spaces.
Faster in operation as compared to Von-Neuman

architecture

HARVARD ARCHITECTURE

VON NEUMANN
VON NEUMANN VS. HARVARD
VS. HARVARD
ARCHITECTUREVON NEUMANN VS. HARVARD
ARCHITECTURE
ARCHITECTURE
VON-NEUMANN HARVARD
1. Data and program are stored in the same 1. Data and program memories are separate.
memory.
2.The code is executed serially and takes 2.The code is executed in parallel.
more clock cycles.
3.The programs can be optimized in lesser 3.The program tend to grow big in size.
size.
4.Control unit for the two buses is more
4.One bus is simpler for the control unit
complicated and more expensive.
design.
5.Used in conventional processors. 5.Used in latest embedded systems,image

processing systems.

SOME BASIC TERMS RELATED WITH
MEMORY ADDRESSING
 MEMORY WIDTH
 ADDRESS WIDTH
 ADDRESS SPACE

CONTT..
 MEMORY WIDTH:How many bits are there in each

memory cell?
 ADDRESS WIDTH:How many bits used to represent each

address, determines the maximum memory size .
 ADDRESS SPACE:The number of uniquely identifiable

memory locations.

Example.
Que: For a 256 Mbyte memory, suppose its memory width is 8

bits (or 1 bytes) then
What is its address space?
What is its address width?

CONTT..
Solution:If address width is n then address space is 2n.

Address width=28
Address Space=228

Que:A memory space is given as:

CONTT..
Q1. What is memory width?

Q2.What is its address space?
Q3.What is its address width?
Q4.What is the content of memory location address 4?

CONTT..
Solution: 1. 8 bits
2. 8 bytes
3. 3
4. 6=0000 0110

COMPUTER
HARDWARE
COMPONENTS:ALU,
REGISTERS AND
MEMORY

 Digital circuit used to perform arithmetic and logic operations.
 Fundamental building block of CPU.
 Usually takes two inputs called operands and a code called

OPCODE which specifies operation to be performed on the
operands.
22
FUNDAMENTAL CONSTITUENTS OF ALU
 REGISTERS.
 LOGIC AND ARITHMETIC CIRCUITRY.
 BUS LINE BETWEEN COMPONENTS.
23
Contt..
ADD X, Y
Assume: opcode for ADD is 9, and addresses X=99, Y=100

ALU CIRCUITRY
26
Contt..
 R0,R1……..Rn are the registers that are connected to ALU circuitry

by bus.
 GT,EQ and LT are some predicates basically used for comparison.

Also called Condition codes.
27
CPU
Control unit tells ALU which operation to perform on data

and ALU stores the result in output register.
28
MEMORY
• Collection of storage cells.
• Binary information is stored in groups of bits called words.
• A memory word is a group of 1’s and 0’s.
• Internal structure is specified by no. of words it contains and

no. of bits in each word.
29
TYPES OF MEMORY
 PRIMARY MEMORY
 SECONDARY MEMORY
30
PRIMARY MEMORY
 Also called main memory.
 Holds only those data and instructions on which the computer

is currently working.
 It has a limited capacity and data is lost when power is

switched off.
31
RAM(RANDOM ACCESS MEMORY)
32
TYPES OF RAM
RAM
SRAM DRAM
DDR2
RDRAM SDRAM DDRSDRAM
SDRAM
33
ROM(READ ONLY MEMORY)

TYPES OF ROM
ROM
PROM
EEPROM
EPROM

SECONDARY MEMORY
 Also called Non-volatile/external memory.
 Storing data/information permanently.
 Slower than main memory.

SECONDARY MEMORY

REGISTERS

MICROOPERATION
 Operations executed on data stored in registers are called

microoperations.

TYPES OF MICROOPERATIONS
 Register transfer microoperations

 Arithmetic Microoperations
 Logic Microoperations
 Shift Microoperations.

TYPES OF REGISTERS
 ACCUMULATOR
 INSTRUCTION REGISTER
 DATA REGISTER
 TEMPORARY REGISTER
 ADDRESS REGISTER
 PROGRAM COUNTER
 INPUT REGISTER
 OUTPUT REGISTER

BUS
 Wire or collection of wires that carries multibit information.
 Purpose is to transfer the information from one system to

another.

NEED OF BUS
 To avoid excessive wiring while performing transfer of

information from one register to another.
46
48
OBJECTIVES
 Basic Terminology
 Levels of Programming Language
 Assembly Language
 Stored Program Organization
 Instruction types,cycle
 Input output instructions
49
OBJECTIVES
 Addressing Modes
 RISC and CISC
 Pipelining
50
INSTRUCTION
 Order given to a computer processor by a computer program

to compute any task.
51
PROGRAM
 Sequence of machine instructions is called a program.
52
LANGUAGE
 System of communication that is used is called a

language.
53
PROGRAMMING LANGUAGE
 Set of rules that a programmer use to develop software or to

write some instructions for a computer to understand.
54
LEVELS OF PROGRAMMING LANGUAGE
55
MACHINE LANGUAGE
 Language closer to the hardware itself is machine language.
 Programs written in machine language are highly efficient.
 Its difficult to memorise different binary codes.
56
ASSEMBLY LANGUAGE
 Makes programming easier for the human.

 Uses mnemonic codes
 ADD
 MOV
etc.
Requires translators.

EXAMPLE OF ASSEMBLY LANGUAGE

HIGH LEVEL LANGUAGE
 Uses English like symbols to write different instructions.
 Easier to learn.
 Requires translators.

HIGH LEVEL LANGUAGE
c=a+b;

ASSEMBLY
LANGUAGE

Contt…
 Programs written for a computer may be in:
 Binary code.
 Octal or hexadecimal code.
 Symbolic code.
 High level programming languages.

TRANSLATOR
 A translator takes a program written in source language as

input and converts it into a program in target language as
output.

TYPES OF TRANSLATORS
 COMPILERS
 INTERPRETER
 ASSEMBLER

COMPILERS
 Compiler is a translator which is used to convert

programs in high-level language to low-level
language.

INTERPRETERS
 Interpreter is a translator which is used to convert programs in

high-level language to low-level language.

ASSEMBLER
 Assembler is a translator which is used to translate the

assembly language code into machine language code.

COMPILER VS. INTERPRETER

INSTRUCTION
 A binary code that specifies a sequence of microoperations for the computer.
70
INSTRUCTION CODE
 Group of bits that instruct the computer to perform a specific operation.
71
Instruction
• Instruction Codes
An instruction is a group of bits that
instruct the computer to perform the specific
operation.
• Instruction Format
Fig 3: Instruction format [3]

Instruction
• Operation Code(OpCode)
The operation code of an instruction is a group of bits that
define such operations as add, subtract, multiply, shift and
complement.
Example: ADD, LDA, STA, MOV, MVI, HLT etc.
• Operand
Data: Value/Register/Memory
Addressing Modes
Addressing Modes
• How data is being assigned/addressed to instructions is
called addressing mode.
• Generally addressing modes are divided as:

• Direct addressing(Figure: b)
• Indirect addressing(Figure: c)
• Effective address?
• Effective address(EA)?
– EA = Base Address + Given Address
Direct and Indirect Address
Fig 4: Demonstration of Direct and indirect address

[3]
Types: Addressing Modes
• Implied Mode- operands are specified implicitly in the instruction
itself.
• Immediate Mode- the address field contains the operand itself

instead of the address of the operand.
• Register Mode- the address field contains the address of a CPU

register which contains the operand.
• Register Indirect Mode- the address field contains the address of

a register which holds the memory address of the operand.
Types: Addressing Modes
• Relative Mode: Relative address means
an address specified by indicating its distance
from another address, called the base
address.
• Index/Based Indexed Mode: It means

an address specified by indicating its distance
from another base address.
Contd...
• Auto increment and auto decrement: The register
whose number is included in the instruction code,
contains the address of the operand.
• Auto increment Mode = after operand
addressing , the contents of the register is
incremented. written as (R4)+.
• Decrement Mode = before operand addressing,
the contents of the register is decrement. written
as -(R4).
Effective Address
• Direct Address-500 operand-500
• Indirect Address-800 operand 300
• Immediate Address- 201opreand500
• Relative address 500+202=702 operand=325
• Indexed mode= 100+500=600 operand 900
• Registered mode =R1 operand= 400
• Register indirect=400 operand 700
OPERATION CODE
 Group of bits that define such operations as add,subtract,multiply,shift and complement.

 n bits:2n distinct operations.
81
82
BASIC COMPUTER INSTRUCTION
FORMATS
83
84
Timing and Control
• Two types of control organization
• Hardwired:
• Microprogrammed
Contd..
• Hardwired: The control signals are generated
as an output of a set of basic logic gates, the
input of which derives from the binary bits in
the Instruction Register. It is fast. Modification
are to be done with wiring so difficult.
• Microprogrammed: The control signals are
generated by a microprogram that is stored in
Control Read Only Memory
Design of Control Unit
INSTRUCTION CYCLE
Fetch
Decode
Execute
89
Instruction Cycle
1. Fetch an instruction from memory(Reading of Instruction from

Memory).
2. Decode the instruction.

3. Read the effective address from memory if the
instruction has an indirect address.(Optional)
4. Execute the instruction.
Instruction Cycle: Fetch Phase
Instruction Cycle:
Fetch Phase
Fig 5: Register transfers for the fetch phase [3]

Fig 7: Flowchart for instruction cycle [3]
FETCH AND DECODE
 T0: AR ← PC
 T1: IR ← M[AR], PC ← PC + 1
 T2: D0,…, D1 ← Decode IR (12-14), AR ← IR(0 −11),
1 ← IR (15)
95
INSTRUCTION TYPES
REGISTER REFERENCE
MEMORY REFERNCE
INPUT OUTPUT INSTRUCTIONS
96
Table2 : Execution of Register-reference instructions[3]
Memory Reference Instructions
Input-output Instructions
FAQs
• Discuss the types of Memory.

• Differentiate between RISC and CISC.
• Define Register Stack.
• What is the need of using bus?

References
• J.P. Hayes, “Computer Architecture and Organization”, Third

Edition.
• Mano, M., “Computer System Architecture”, Third Edition,
Prentice Hall.
• Stallings, W., “Computer Organization and Architecture”,
Eighth Edition, Pearson Education.

Course Outcomes
• Understand the operation of electronic logic elements.

• Understand the organization of a computer system in terms of
its main components.
• Understand different processor architectures

Thanks!

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Subject: Computer Organization & Architecture

Semester: Jan-May 2019

Apex Institute of Technology- MBA

• To make students familiarize with the architecture of a

Apex Institute of Technology- CSE

Apex Institute of Technology- CSE

• Computer Architecture is a set of rules and methods that describes

Apex Institute of Technology- CSE

Apex Institute of Technology- CSE

 Named after mathematician John Von Neumann.

 Design model for stored program digital computer.

 Also Known as Von-Neumann model.

 Uses a processing unit and a single separate storage structure

Apex Institute of Technology- CSE

Apex Institute of Technology- CSE

 One shared memory for instructions and data.

 Instructions and data have to be fetched in sequential order.

Apex Institute of Technology- CSE

Apex Institute of Technology- CSE

Apex Institute of Technology- CSE

Computer architecture with physically separate storage and

Distinct code and data address spaces.

Faster in operation as compared to Von-Neuman

Apex Institute of Technology- CSE

Apex Institute of Technology- CSE

5.Used in conventional processors. 5.Used in latest embedded systems,image

Apex Institute of Technology- CSE

Apex Institute of Technology- CSE

 MEMORY WIDTH:How many bits are there in each

 ADDRESS WIDTH:How many bits used to represent each

 ADDRESS SPACE:The number of uniquely identifiable

Apex Institute of Technology- CSE

Que: For a 256 Mbyte memory, suppose its memory width is 8

Apex Institute of Technology- CSE

Solution:If address width is n then address space is 2n.

Apex Institute of Technology- CSE

Apex Institute of Technology- CSE

Q1. What is memory width?

Apex Institute of Technology- CSE

Apex Institute of Technology- CSE

Apex Institute of Technology- CSE

 Fundamental building block of CPU.

 Usually takes two inputs called operands and a code called

 LOGIC AND ARITHMETIC CIRCUITRY.

 BUS LINE BETWEEN COMPONENTS.

Apex Institute of Technology- CSE

 R0,R1……..Rn are the registers that are connected to ALU circuitry

 GT,EQ and LT are some predicates basically used for comparison.

Control unit tells ALU which operation to perform on data

• Collection of storage cells.

• Binary information is stored in groups of bits called words.

• A memory word is a group of 1’s and 0’s.

• Internal structure is specified by no. of words it contains and

 Also called main memory.

 Holds only those data and instructions on which the computer

 It has a limited capacity and data is lost when power is

Apex Institute of Technology- CSE

Apex Institute of Technology- CSE

 Also called Non-volatile/external memory.

 Storing data/information permanently.

 Slower than main memory.

Apex Institute of Technology- CSE

Apex Institute of Technology- CSE