Programming for Performance

1
 Introduction
Rich space of techniques and issues
• Trade off and interact with one another
Issues can be addressed/helped by software or hardware
• Algorithmic or programming techniques
• Architectural techniques
Focus here on performance issues and software techniques
• Why should architects care?
– understanding the workloads for their machines
– hardware/software tradeoffs: where should/shouldn’t architecture help
• Point out some architectural implications
• Architectural techniques covered in rest of class

2
 Programming as Successive Refinement
Not all issues dealt with up front
Partitioning often independent of architecture, and done first
• View machine as a collection of communicating processors
– balancing the workload
– reducing the amount of inherent communication
– reducing extra work
• Tug-o-war even among these three issues
Then interactions with architecture
• View machine as extended memory hierarchy
– extra communication due to architectural interactions
– cost of communication depends on how it is structured
• May inspire changes in partitioning
Discussion of issues is one at a time, but identifies tradeoffs
• Use examples, and measurements on SGI Origin2000
3
 Outline
Partitioning for performance
Relationship of communication, data locality and architecture
Programming for performance
For each issue:
• Techniques to address it, and tradeoffs with previous issues
• Illustration using case studies
• Application to grid solver
• Some architectural implications

Components of execution time as seen by processor

• What workload looks like to architecture, and relate to software issues
Applying techniques to case-studies to get high-performance versions
Implications for programming models
4
 Partitioning for Performance
Balancing the workload and reducing wait time at synch points
Reducing inherent communication
Reducing extra work

Even these algorithmic issues trade off:

• Minimize comm. => run on 1 processor => extreme load imbalance
• Maximize load balance => random assignment of tiny tasks => no
control over communication
• Good partition may imply extra work to compute or manage it
Goal is to compromise
• Fortunately, often not difficult in practice

5
 Load Balance and Synch Wait Time
Sequential Work
Limit on speedup: Speedupproblem(p) <
Max Work on any Processor
• Work includes data access and other costs
• Not just equal work, but must be busy at same time

Four parts to load balance and reducing synch wait time:

1. Identify enough concurrency
2. Decide how to manage it
3. Determine the granularity at which to exploit it
4. Reduce serialization and cost of synchronization

6
 Identifying Concurrency
Techniques seen for equation solver:
• Loop structure, fundamental dependences, new algorithms
Data Parallelism versus Function Parallelism
Often see orthogonal levels of parallelism; e.g. VLSI routing
W1 W2 W3

(a)

Wire W2 expands to segments

S21 S22 S23 S24 S25 S26

(b)

Segment S23 expands to routes

(c)

7
 Identifying Concurrency (contd.)
Function parallelism:
• entire large tasks (procedures) that can be done in parallel
• on same or different data
• e.g. different independent grid computations in Ocean
• pipelining, as in video encoding/decoding, or polygon rendering
• degree usually modest and does not grow with input size
• difficult to load balance
• often used to reduce synch between data parallel phases

Most scalable programs data parallel (per this loose definition)

• function parallelism reduces synch between data parallel phases

8
 Deciding How to Manage Concurrency
Static versus Dynamic techniques
Static:
• Algorithmic assignment based on input; won’t change
• Low runtime overhead
• Computation must be predictable
• Preferable when applicable (except in multiprogrammed/heterogeneous
environment)
Dynamic:
• Adapt at runtime to balance load
• Can increase communication and reduce locality
• Can increase task management overheads

9
 Dynamic Assignment
Profile-based (semi-static):
• Profile work distribution at runtime, and repartition dynamically
• Applicable in many computations, e.g. Barnes-Hut, some graphics

Dynamic Tasking:
• Deal with unpredictability in program or environment (e.g. Raytrace)
– computation, communication, and memory system interactions
– multiprogramming and heterogeneity
– used by runtime systems and OS too
• Pool of tasks; take and add tasks until done
• E.g. “self-scheduling” of loop iterations (shared loop counter)

10
 Dynamic Tasking with Task Queues
Centralized versus distributed queues
Task stealing with distributed queues
• Can compromise comm and locality, and increase synchronization
• Whom to steal from, how many tasks to steal, ...
• Termination detection
• Maximum imbalance related to size of task
All processes
insert tasks P0 inserts P1 inserts P2 inserts P3 inserts

QQ 0 Q1 Q2 Q3

Others may
steal
All remove tasks P0 removes P1 removes P2 removes P3 removes

(a) Centralized task queue (b) Distributed task queues (one per pr ocess)

11
 Impact of Dynamic Assignment
On SGI Origin 2000 (cache-coherent shared memory):

 Origin, semistatic  Origin, dynamic

30  30
 Challenge, semistatic  Challenge, dynamic
 Origin, static  Origin, static
25  Challenge, static 25  Challenge, static


20 20 

Speedup

Speedup

 
15  15 





10 10

 
 

5 5

 
 


 


 


(a) 0 (b) 0
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31
Number of processors Number of processors

12
 Determining Task Granularity
Task granularity: amount of work associated with a task

General rule:
• Coarse-grained => often less load balance
• Fine-grained => more overhead; often more comm., contention

Comm., contention actually affected by assignment, not size

• Overhead by size itself too, particularly with task queues

13
 Reducing Serialization
Careful about assignment and orchestration (including scheduling)
Event synchronization
• Reduce use of conservative synchronization
– e.g. point-to-point instead of barriers, or granularity of pt-to-pt
• But fine-grained synch more difficult to program, more synch ops.
Mutual exclusion
• Separate locks for separate data
– e.g. locking records in a database: lock per process, record, or field
– lock per task in task queue, not per queue
– finer grain => less contention/serialization, more space, less reuse
• Smaller, less frequent critical sections
– don’t do reading/testing in critical section, only modification
– e.g. searching for task to dequeue in task queue, building tree
• Stagger critical sections in time

14
 Implications of Load Balance
Sequential Work
Extends speedup limit expression to: <
Max (Work + Synch Wait Time)
Generally, responsibility of software

Architecture can support task stealing and synch efficiently

• Fine-grained communication, low-overhead access to queues
– efficient support allows smaller tasks, better load balance
• Naming logically shared data in the presence of task stealing
– need to access data of stolen tasks, esp. multiply-stolen tasks
=> Hardware shared address space advantageous
• Efficient support for point-to-point communication

15
 Reducing Inherent Communication
Communication is expensive!
Measure: communication to computation ratio
Focus here on inherent communication
• Determined by assignment of tasks to processes
• Later see that actual communication can be greater

Assign tasks that access same data to same process

Solving communication and load balance NP-hard in general case
But simple heuristic solutions work well in practice
• Applications have structure!

16
 Domain Decomposition
Works well for scientific, engineering, graphics, ... applications
Exploits local-biased nature of physical problems
• Information requirements often short-range
• Or long-range but fall off with distance

Simple example: nearest-neighbor grid computation

n n
p
P0 P1 P2 P3

P4 P5 P6 P7
n n
p
P8 P9 P10 P11

P12 P13 P14 P15

Perimeter to Area comm-to-comp ratio (area to volume in 3-d)

•Depends on n,p: decreases with n, increases with p

17
 Domain Decomposition (contd)
Best domain decomposition depends on information requirements
Nearest neighbor example: block versus strip decomposition:
n
-----
-
p n

P0 P1 P2 P3

P4 P5 P6 P7
n
-----
- n
p P8 P9 P10 P11

P12 P13 P14 P15

4*√p 2*p
Comm to comp: n
for block, n
for strip
• Retain block from here on
Application dependent: strip may be better in other cases
• E.g. particle flow in tunnel

18
 Finding a Domain Decomposition
Static, by inspection
• Must be predictable: grid example above, and Ocean
Static, but not by inspection
• Input-dependent, require analyzing input structure
• E.g sparse matrix computations, data mining (assigning itemsets)
Semi-static (periodic repartitioning)
• Characteristics change but slowly; e.g. Barnes-Hut
Static or semi-static, with dynamic task stealing
• Initial decomposition, but highly unpredictable; e.g ray tracing

19
 Other Techniques
Scatter Decomposition, e.g. initial partition in Raytrace

12 12 12 12

3 4 3 4 3 4 3 4
12
12 12 12 12

3 4 3 4 3 4 3 4

12 12 12 12

3 4 3 4 3 4 3 4
3 4
12 12 12 12

3 4 3 4 3 4 3 4

Domain decomposition Scatter decomposition

Preserve locality in task stealing

•Steal large tasks for locality, steal from same queues, ...
20
 Implications of Comm-to-Comp Ratio
Architects examine application needs to see where to spend money
If denominator is execution time, ratio gives average BW needs
If operation count, gives extremes in impact of latency and bandwidth
• Latency: assume no latency hiding
• Bandwidth: assume all latency hidden
• Reality is somewhere in between

Actual impact of comm. depends on structure and cost as well

Sequential Work
Speedup <
Max (Work + Synch Wait Time + Comm Cost)
• Need to keep communication balanced across processors as well

21
 Reducing Extra Work
Common sources of extra work:
• Computing a good partition
– e.g. partitioning in Barnes-Hut or sparse matrix
• Using redundant computation to avoid communication
• Task, data and process management overhead
– applications, languages, runtime systems, OS
• Imposing structure on communication
– coalescing messages, allowing effective naming

Architectural Implications:
• Reduce need by making communication and orchestration efficient

Sequential Work
Speedup <
Max (Work + Synch Wait Time + Comm Cost + Extra Work)

22
Summary: Analyzing Parallel Algorithms
Requires characterization of multiprocessor and algorithm
Historical focus on algorithmic aspects: partitioning, mapping
PRAM model: data access and communication are free
• Only load balance (including serialization) and extra work matter
Sequential Instructions
Speedup <
Max (Instructions + Synch Wait Time + Extra Instructions)
• Useful for early development, but unrealistic for real performance
• Ignores communication and also the imbalances it causes
• Can lead to poor choice of partitions as well as orchestration
• More recent models incorporate comm. costs; BSP, LogP, ...

23
 Limitations of Algorithm Analysis
Inherent communication in parallel algorithm is not all
• artifactual communication caused by program implementation and
architectural interactions can even dominate
• thus, amount of communication not dealt with adequately
Cost of communication determined not only by amount
• also how communication is structured
• and cost of communication in system

Both architecture-dependent, and addressed in orchestration step

To understand techniques, first look at system interactions

24
 What is a Multiprocessor?
A collection of communicating processors
• View taken so far
• Goals: balance load, reduce inherent communication and extra work

A multi-cache, multi-memory system

• Role of these components essential regardless of programming model
• Prog. model and comm. abstr. affect specific performance tradeoffs

Most of remaining perf. issues focus on second aspect

25
 Memory-oriented View
Multiprocessor as Extended Memory Hierarchy
– as seen by a given processor

Levels in extended hierarchy:

• Registers, caches, local memory, remote memory (topology)
• Glued together by communication architecture
• Levels communicate at a certain granularity of data transfer

Need to exploit spatial and temporal locality in hierarchy

• Otherwise extra communication may also be caused
• Especially important since communication is expensive

26
 Uniprocessor
Performance depends heavily on memory hierarchy
Time spent by a program
Timeprog(1) = Busy(1) + Data Access(1)
• Divide by cycles to get CPI equation

Data access time can be reduced by:

• Optimizing machine: bigger caches, lower latency...
• Optimizing program: temporal and spatial locality

27
 Extended Hierarchy
Idealized view: local cache hierarchy + single main memory
But reality is more complex
• Centralized Memory: caches of other processors
• Distributed Memory: some local, some remote; + network topology
• Management of levels
– caches managed by hardware
– main memory depends on programming model
• SAS: data movement between local and remote transparent
• message passing: explicit

• Levels closer to processor are lower latency and higher bandwidth

• Improve performance through architecture or program locality
• Tradeoff with parallelism; need good node performance and parallelism

28
Artifactual Comm. in Extended Hierarchy
Accesses not satisfied in local portion cause communication
• Inherent communication, implicit or explicit, causes transfers
– determined by program
• Artifactual communication
– determined by program implementation and arch. interactions
– poor allocation of data across distributed memories
– unnecessary data in a transfer
– unnecessary transfers due to system granularities
– redundant communication of data
– finite replication capacity (in cache or main memory)
•Inherent communication assumes unlimited capacity, small transfers,
perfect knowledge of what is needed.
• More on artifactual later; first consider replication-induced further

29
 Communication and Replication
Comm induced by finite capacity is most fundamental artifact
• Like cache size and miss rate or memory traffic in uniprocessors
• Extended memory hierarchy view useful for this relationship

View as three level hierarchy for simplicity

• Local cache, local memory, remote memory (ignore network topology)
Classify “misses” in “cache” at any level as for uniprocessors
– compulsory or cold misses (no size effect)
– capacity misses (yes)
– conflict or collision misses (yes)
– communication or coherence misses (no)
• Each may be helped/hurt by large transfer granularity (spatial locality)

30
 Working Set Perspective
•At a given level of the hierarchy (to the next further one)

Data traffic
First working set

Capacity-generated traffic
(including conflicts)
Second working set

Other capacity-independent communication

Inherent communication

Cold-start (compulsory) traffic

Replication capacity (cache size)

• Hierarchy of working sets

• At first level cache (fully assoc, one-word block), inherent to algorithm
– working set curve for program
• Traffic from any type of miss can be local or nonlocal (communication)

31
 Orchestration for Performance
Reducing amount of communication:
• Inherent: change logical data sharing patterns in algorithm
• Artifactual: exploit spatial, temporal locality in extended hierarchy
– Techniques often similar to those on uniprocessors

Structuring communication to reduce cost

Let’s examine techniques for both...

32
 Reducing Artifactual Communication
Message passing model
• Communication and replication are both explicit
• Even artifactual communication is in explicit messages

Shared address space model

• More interesting from an architectural perspective
• Occurs transparently due to interactions of program and system
– sizes and granularities in extended memory hierarchy

Use shared address space to illustrate issues

33
 Exploiting Temporal Locality
• Structure algorithm so working sets map well to hierarchy
– often techniques to reduce inherent communication do well here
– schedule tasks for data reuse once assigned
• Multiple data structures in same phase
– e.g. database records: local versus remote
• Solver example: blocking

(a) Unblocked access pattern in a sweep (b) Blocked access pattern with B = 4

•More useful when O(nk+1) computation on O(nk) data

–many linear algebra computations (factorization, matrix
multiply)
34
 Exploiting Spatial Locality
Besides capacity, granularities are important:
• Granularity of allocation
• Granularity of communication or data transfer
• Granularity of coherence
Major spatial-related causes of artifactual communication:
• Conflict misses
• Data distribution/layout (allocation granularity)
• Fragmentation (communication granularity)
• False sharing of data (coherence granularity)
All depend on how spatial access patterns interact with data structures
• Fix problems by modifying data structures, or layout/alignment
Examine later in context of architectures
• one simple example here: data distribution in SAS solver
35
 Spatial Locality Example
• Repeated sweeps over 2-d grid, each time adding 1 to elements
• Natural 2-d versus higher-dimensional array representation
Contiguity in memory layout

P0 P1 P2 P3 P0 P1 P2 P3

P4 P5 P6 P7 P4 P5 P6 P7

P8 P8

Page straddles Page does

Cache block Cache block is
partition boundaries: not straddle
straddles partition within a partition
difficult to distribute partition
boundary
memory well boundary

(a) Two-dimensional array (b) Four-dimensional array

36
 Tradeoffs with Inherent Communication
Partitioning grid solver: blocks versus rows
• Blocks still have a spatial locality problem on remote data
• Rowwise can perform better despite worse inherent c-to-c ratio
Good spacial locality on
nonlocal accesses at
row-oriented boudary

Poor spacial locality on

nonlocal accesses at
column-oriented
boundary

•Result depends on n and p

37
 Example Performance Impact
Equation solver on SGI Origin2000

30 50
 Rows 4D
45
 4D 4D-rr
25
 2D 40  Rows

35
 Rows-rr

20  2D
30  2D-rr 
Speedup

Speedup
 
 
15 25 

 
 20 

 
10 

 15 



 10
5 





 5 



 



 
0 0

 

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31
Number of processors Number of processors

38
 Architectural Implications of Locality
Communication abstraction that makes exploiting it easy
For cache-coherent SAS, e.g.:
• Size and organization of levels of memory hierarchy
– cost-effectiveness: caches are expensive
– caveats: flexibility for different and time-shared workloads
• Replication in main memory useful? If so, how to manage?
– hardware, OS/runtime, program?

• Granularities of allocation, communication, coherence (?)

– small granularities => high overheads, but easier to program

Machine granularity (resource division among processors, memory...)

39
 Structuring Communication
Given amount of comm (inherent or artifactual), goal is to reduce cost
Cost of communication as seen by process:
C = f * ( o + l + n /m + tc - overlap)
c
B
– f = frequency of messages
– o = overhead per message (at both ends)
– l = network delay per message
– nc = total data sent
– m = number of messages
– B = bandwidth along path (determined by network, NI, assist)
– tc = cost induced by contention per message
– overlap = amount of latency hidden by overlap with comp. or comm.
• Portion in parentheses is cost of a message (as seen by processor)
• That portion, ignoring overlap, is latency of a message

• Goal: reduce terms in latency and increase overlap

40
 Reducing Overhead
Can reduce no. of messages m or overhead per message o
o is usually determined by hardware or system software
• Program should try to reduce m by coalescing messages
• More control when communication is explicit

Coalescing data into larger messages:

• Easy for regular, coarse-grained communication
• Can be difficult for irregular, naturally fine-grained communication
– may require changes to algorithm and extra work
• coalescing data and determining what and to whom to send
– will discuss more in implications for programming models later

41
 Reducing Network Delay
Network delay component = f*h*th
– h = number of hops traversed in network
– th = link+switch latency per hop

Reducing f: communicate less, or make messages larger

Reducing h:
• Map communication patterns to network topology
– e.g. nearest-neighbor on mesh and ring; all-to-all
• How important is this?
– used to be major focus of parallel algorithms
– depends on no. of processors, how th, compares with other components
– less important on modern machines
• overheads, processor count, multiprogramming

42
 Reducing Contention
All resources have nonzero occupancy
• Memory, communication controller, network link, etc.
• Can only handle so many transactions per unit time

Effects of contention:
• Increased end-to-end cost for messages
• Reduced available bandwidth for individual messages
• Causes imbalances across processors

Particularly insidious performance problem

• Easy to ignore when programming
• Slow down messages that don’t even need that resource
– by causing other dependent resources to also congest
• Effect can be devastating: Don’t flood a resource!

43
 Types of Contention
Network contention and end-point contention (hot-spots)
Location and Module Hot-spots
• Location: e.g. accumulating into global variable, barrier
– solution: tree-structured communication
Contention Little contention

Flat
Tree structured

•Module: all-to-all personalized comm. in matrix transpose

–solution:
stagger access by different processors to same
node temporally
•In
general, reduce burstiness; may conflict with making
messages larger
44
 Overlapping Communication
Cannot afford to stall for high latencies
• even on uniprocessors!
Overlap with computation or communication to hide latency
Requires extra concurrency (slackness), higher bandwidth
Techniques:
• Prefetching
• Block data transfer
• Proceeding past communication
• Multithreading

45
 Summary of Tradeoffs
Different goals often have conflicting demands
• Load Balance
– fine-grain tasks
– random or dynamic assignment
• Communication
– usually coarse grain tasks
– decompose to obtain locality: not random/dynamic
• Extra Work
– coarse grain tasks
– simple assignment
• Communication Cost:
– big transfers: amortize overhead and latency
– small transfers: reduce contention

46
 Processor-Centric Perspective
100 100
Synchronization Data-remote
Busy-overhead Busy-useful

Data-local
75 75
Time (s)

Time (s)
50 50

25 25

P 0 P1 P 2 P 3

(a) Sequential (b) Parallel with four processors

47
 Relationship between Perspectives

Parallelization step(s) Performance issue Processor time component

Decomposition/ Load imbalance and Synch wait

assignment/ synchronization
orchestration

Decomposition/ Extra work Busy-overhead

assignment

Decomposition/ Inherent Data-remote

assignment communication
volume

Orchestration Artifactual Data-local

communication
and data locality

Orchestration/ Communication
mapping structure

48
 Summary
Busy(1) + Data(1)
Speedupprob(p) =
Busyuseful(p)+Datalocal(p)+Synch(p)+Dateremote(p)+Busyoverhead(p)

• Goal is to reduce denominator components

• Both programmer and system have role to play
• Architecture cannot do much about load imbalance or too much
communication
• But it can:
– reduce incentive for creating ill-behaved programs (efficient naming,
communication and synchronization)
– reduce artifactual communication
– provide efficient naming for flexible assignment
– allow effective overlapping of communication

49
 Parallel Application Case Studies
Examine Ocean and Barnes-Hut (others in book)
Assume cache-coherent shared address space
Five parts for each application
• Sequential algorithms and data structures
• Partitioning
• Orchestration
• Mapping
• Components of execution time on SGI Origin2000

50
 Case Study 1: Ocean
Computations in a Time-step:
Put Laplacian Put Laplacian Copy 1, 3 Put 1  3 Put computed 2 Initialize
of 1 in W11 of 3 in W13 into T1, T3 in W2 values in W3  and 
a b

Add f values to columns Copy 1M, 3M Put Laplacian of

of W 11 and W13 into 1, 3  
1M, 3M in W 71,3

Put Jacobians of ( W1, T1), Copy T1, T3 Put Laplacian of

(W 13, T3) in W51, W53 into 1M, 3M W 71,3 in W 41,3

Put Jacobian of Put Laplacian of

(W 2,W3) in W 6 W 41,3 in W 71,3

Update the  expressions

Solve the equation for a and put the result in a

Compute the integral of a

Compute a + C(t) b (Note: a

Solve the equation for  and put result in b
and now  are maintained in a matrix)

Use and to update 1 and  

Update streamfunction running sums and determine whether to end pr

ogram

51
 Partitioning

Exploit data parallelism

• Function parallelism only to reduce synchronization
Static partitioning within a grid computation
• Block versus strip
– inherent communication versus spatial locality in communication
• Load imbalance due to border elements and number of
boundaries
Solver has greater overheads than other computations

52
 Orchestration and Mapping
Spatial Locality similar to equation solver
• Except lots of grids, so cache conflicts across grids
Complex working set hierarchy
• A few points for near-neighbor reuse, three subrows, partition of one grid,
partitions of multiple grids…
• First three or four most important
• Large working sets, but data distribution easy
Synchronization
• Barriers between phases and solver sweeps
• Locks for global variables
• Lots of work between synchronization events
Mapping: easy mapping to 2-d array topology or richer

53
 Execution Time Breakdown
•1030 x 1030 grids with block partitioning on 32-processor Origin2000
Data Data
7 Synch 7 Synch
Busy Busy
6 6
5 5
4 4
Time (s)

Time (s)
3 3
2 2
1 1
0 0
13579 11 13 15 17 19 21 23 25 27 29 31 13579 11 13 15 17 19 21 23 25 27 29 31
Process Process

• 4-d grids much better than 2-d, despite very large caches on machine
– data distribution is much more crucial on machines with smaller caches
• Major bottleneck in this configuration is time waiting at barriers
– imbalance in memory stall times as well

54
 Case Study 2: Barnes-Hut

(a) The spatial domain (b) Quadtree representation

Locality Goal:
• Particles close together in space should be on same processor
Difficulties: Nonuniform, dynamically changing

55
 Application Structure
Build tree

Compute
Compute
forces
moments of cells
Time-steps

Update
Traverse tree
properties
to compute forces

• Main data structures: array of bodies, of cells, and of pointers to them

– Each body/cell has several fields: mass, position, pointers to others
– pointers are assigned to processes

56
 Partitioning
Decomposition: bodies in most phases, cells in computing moments
Challenges for assignment:
• Nonuniform body distribution => work and comm. Nonuniform
– Cannot assign by inspection
• Distribution changes dynamically across time-steps
– Cannot assign statically
• Information needs fall off with distance from body
– Partitions should be spatially contiguous for locality
• Different phases have different work distributions across bodies
– No single assignment ideal for all
– Focus on force calculation phase
• Communication needs naturally fine-grained and irregular

57
 Load Balancing

• Equal particles  equal work.

– Solution: Assign costs to particles based on the work they do

• Work unknown and changes with time-steps

– Insight : System evolves slowly
– Solution: Count work per particle, and use as cost for next time-step.

Powerful technique for evolving physical systems

58
 A Partitioning Approach: ORB
Orthogonal Recursive Bisection:
• Recursively bisect space into subspaces with equal work
– Work is associated with bodies, as before
• Continue until one partition per processor

• High overhead for large no. of processors

59
 Another Approach: Costzones
Insight: Tree already contains an encoding of spatial locality.

P1 P2 P3 P4 P5 P6 P 7 P8

(a) ORB (b) Costzones

• Costzones is low-overhead and very easy to program

60
 Performance Comparison
128.0 ideal

|
costzones: simulator
112.0 ORB: simulator

|
• Speedups on costzones: DASH
simulated costzones: KSR-1
multiprocessor 96.0
|
costzones: Challenge
(16K
particles) 80.0 |

64.0
|

• Extra work in
ORB
partitioning is 48.0
|

key difference
32.0
|

16.0
|

61
 Orchestration and Mapping
Spatial locality: Very different than in Ocean, like other aspects
• Data distribution is much more difficult than
– Redistribution across time-steps
– Logical granularity (body/cell) much smaller than page
– Partitions contiguous in physical space does not imply contiguous in array
– But, good temporal locality, and most misses logically non-local anyway
• Long cache blocks help within body/cell record, not entire partition
Temporal locality and working sets:
• Important working set scales as 1/2log n
• Slow growth rate, and fits in second-level caches, unlike Ocean
Synchronization:
• Barriers between phases
• No synch within force calculation: data written different from data read
• Locks in tree-building, pt. to pt. event synch in center of mass phase
Mapping: ORB maps well to hypercube, costzones to linear array
62
 Execution Time Breakdown
•512K bodies on 32-processor Origin2000
–Static, quite randomized in space, assignment of bodies versus costzones

Data Data
Synch Synch
40 Busy 40 Busy
35 35
30 30
Time (s)

25 25

Time (s)
20 20
15 15
10 10
5 5
0 0
13579 11 13 15 17 19 21 23 25 27 29 31 13579 11 13 15 17 19 21 23 25 27 29 31
Process Process
(a) Static assignment of bodies (b) Semistatic costzone assignment

•Problem with static case is communication/locality, not load balance!

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 Raytrace
Rays shot through pixels in image are called primary rays
• Reflect and refract when they hit objects
• Recursive process generates ray tree per primary ray

Hierarchical spatial data structure keeps track of primitives in scene

• Nodes are space cells, leaves have linked list of primitives
Tradeoffs between execution time and image quality

64
 Partitioning
Scene-oriented approach
• Partition scene cells, process rays while they are in an assigned cell
Ray-oriented approach
• Partition primary rays (pixels), access scene data as needed
• Simpler; used here
Need dynamic assignment; use contiguous blocks to exploit spatial
coherence among neighboring rays, plus tiles for task stealing

A block, A tile,
the unit of the unit of decomposition
assignment and stealing

Could use 2-D interleaved (scatter) assignment of tiles instead 65

 Orchestration and Mapping
Spatial locality
• Proper data distribution for ray-oriented approach very difficult
• Dynamically changing, unpredictable access, fine-grained access
• Better spatial locality on image data than on scene data
– Strip partition would do better, but less spatial coherence in scene access

Temporal locality
• Working sets much larger and more diffuse than Barnes-Hut
• But still a lot of reuse in modern second-level caches
– SAS program does not replicate in main memory

Synchronization:
• One barrier at end, locks on task queues
Mapping: natural to 2-d mesh for image, but likely not important

66
 Execution Time Breakdown
200 Data 200
180 Synch 180
160 Busy 160
140 140

Time (s)
Time (s)

120 120
100 100
80 80
60 60
40 40
20 20
0 0
13579 11 13 15 17 19 21 23 25 27 29 31 13579 11 13 15 17 19 21 23 25 27 29 31
Process Process

• Task stealing clearly very important for load balance

67
 Implications for Programming Models
Shared address space and explicit message passing
• SAS may provide coherent replication or may not
• Focus primarily on former case

Assume distributed memory in all cases

Recall any model can be supported on any architecture
• Assume both are supported efficiently
• Assume communication in SAS is only through loads and stores
• Assume communication in SAS is at cache block granularity

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 Issues to Consider
Functional issues:
• Naming
• Replication and coherence
• Synchronization

Organizational issues:
• Granularity at which communication is performed
Performance issues
• Endpoint overhead of communication
– (latency and bandwidth depend on network so considered similar)
• Ease of performance modeling
Cost Issues
• Hardware cost and design complexity

69
 Naming
SAS: similar to uniprocessor; system does it all
MP: each process can only directly name the data in its address space
• Need to specify from where to obtain or where to transfer nonlocal data
• Easy for regular applications (e.g. Ocean)
• Difficult for applications with irregular, time-varying data needs
– Barnes-Hut: where the parts of the tree that I need? (change with time)
– Raytrace: where are the parts of the scene that I need (unpredictable)
• Solution methods exist
– Barnes-Hut: Extra phase determines needs and transfers data before
computation phase
– Raytrace: scene-oriented rather than ray-oriented approach
– both: emulate application-specific shared address space using hashing

70
 Replication
Who manages it (i.e. who makes local copies of data)?
• SAS: system, MP: program
Where in local memory hierarchy is replication first done?
• SAS: cache (or memory too), MP: main memory
At what granularity is data allocated in replication store?
• SAS: cache block, MP: program-determined
How are replicated data kept coherent?
• SAS: system, MP: program
How is replacement of replicated data managed?
• SAS: dynamically at fine spatial and temporal grain (every access)
• MP: at phase boundaries, or emulate cache in main memory in software
Of course, SAS affords many more options too (discussed later)
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 Amount of Replication Needed
Mostly local data accessed => little replication
Cache-coherent SAS:
• Cache holds active working set
– replaces at fine temporal and spatial grain (so little fragmentation too)
• Small enough working sets => need little or no replication in memory
Message Passing or SAS without hardware caching:
• Replicate all data needed in a phase in main memory
– replication overhead can be very large (Barnes-Hut, Raytrace)
– limits scalability of problem size with no. of processors
• Emulate cache in software to achieve fine-temporal-grain replacement
– expensive to manage in software (hardware is better at this)
– may have to be conservative in size of cache used
– fine-grained message generated by misses expensive (in message passing)
– programming cost for cache and coalescing messages
72
Communication Overhead and Granularity
Overhead directly related to hardware support provided
• Lower in SAS (order of magnitude or more)
Major tasks:
• Address translation and protection
– SAS uses MMU
– MP requires software protection, usually involving OS in some way
• Buffer management
– fixed-size small messages in SAS easy to do in hardware
– flexible-sized message in MP usually need software involvement
• Type checking and matching
– MP does it in software: lots of possible message types due to flexibility
• A lot of research in reducing these costs in MP, but still much larger
Naming, replication and overhead favor SAS
• Many irregular MP applications now emulate SAS/cache in software
73
 Block Data Transfer
Fine-grained communication not most efficient for long messages
• Latency and overhead as well as traffic (headers for each cache line)
SAS: can using block data transfer
• Explicit in system we assume, but can be automated at page or object
level in general (more later)
• Especially important to amortize overhead when it is high
– latency can be hidden by other techniques too

Message passing:
• Overheads are larger, so block transfer more important
• But very natural to use since message are explicit and flexible
– Inherent in model

74
 Synchronization
SAS: Separate from communication (data transfer)
• Programmer must orchestrate separately
Message passing
• Mutual exclusion by fiat
• Event synchronization already in send-receive match in synchronous
– need separate orchestratation (using probes or flags) in asynchronous

75
 Hardware Cost and Design Complexity
Higher in SAS, and especially cache-coherent SAS
But both are more complex issues
• Cost
– must be compared with cost of replication in memory
– depends on market factors, sales volume and other nontechnical issues
• Complexity
– must be compared with complexity of writing high-performance programs
– Reduced by increasing experience

76
 Performance Model
Three components:
• Modeling cost of primitive system events of different types
• Modeling occurrence of these events in workload
• Integrating the two in a model to predict performance
Second and third are most challenging
Second is the case where cache-coherent SAS is more difficult
• replication and communication implicit, so events of interest implicit
– similar to problems introduced by caching in uniprocessors
• MP has good guideline: messages are expensive, send infrequently
• Difficult for irregular applications in either case (but more so in SAS)
Block transfer, synchronization, cost/complexity, and performance
modeling advantageus for MP

77
 Summary for Programming Models
Given tradeoffs, architect must address:
• Hardware support for SAS (transparent naming) worthwhile?
• Hardware support for replication and coherence worthwhile?
• Should explicit communication support also be provided in SAS?

Current trend:
• Tightly-coupled multiprocessors support for cache-coherent SAS in hw
• Other major platform is clusters of workstations or multiprocessors
– currently don’t support SAS in hardware, mostly use message passing

78
 Summary
Crucial to understand characteristics of parallel programs
• Implications for a host or architectural issues at all levels
Architectural convergence has led to:
• Greater portability of programming models and software
– Many performance issues similar across programming models too
• Clearer articulation of performance issues
– Used to use PRAM model for algorithm design
– Now models that incorporate communication cost (BSP, logP,….)
– Emphasis in modeling shifted to end-points, where cost is greatest
– But need techniques to model application behavior, not just machines

Performance issues trade off with one another; iterative refinement

Ready to understand using workloads to evaluate systems issues

79