Академический Документы
Профессиональный Документы
Культура Документы
Estimate
45 nm SRAM CPU Ramp
2001 2002 2003 2004 2005 2006 2007 2008 2009 2010
1011
1965 Data (Moore)
1010
Memory
109 Microprocessor
Tri-Gate Carbon
Transistors/Die
103
102
Kilo Mega Giga Tera
101 Xtor Xtor Xtor Xtor
100
1960 1970 1980 1990 2000 2010 2020 2030
1400
SiO2 Lkg
1200 SD Lkg
Power Density (W/cm2)
1000 Active
800
600
400
200
0
90nm 65nm 45nm 32nm 22nm 16nm
1.4
Frequency
Normalized Frequency
1.3 30%
~30%
1.2
1.1 Leakage
Power
1.0
5X ~5-10X
0.9
1 2 3 4 5
Normalized Leakage (Isb)
Source: Intel
Shifting Design Paradigms for
“DEEP” VLSI Designs
Energy-Efficiency
Device Variability
Layout Complexity
Constrained Power Through Technology,
Circuits and Architecture Innovations
1400
SiO2 Lkg
1200 SD Lkg
Power Density (W/cm2)
1000 Active
800
600
400
200
0
90nm 65nm 45nm 32nm 22nm 16nm
Source: Intel
Leakage Control
Body Bias Stack Effect Sleep Transistor
Vbp
Vdd
+Ve
-Ve Vbn
High Supply
Low Supply
Voltage
Voltage
• Challenges:
• Interface between low & high Vdd
• Delivery and distribution
Dual-Supply Last-Level Cache
1.2V
Supply 1
Variable 0.7V
standby
Supply 2
Fixed = 1.2V
~35%
Less
Microprocessor Core
(logic, L0 -L2 cache) Power
Equivalent
LLC
Performance
Desktop Server
Up to
30%
Board
Area
Mobile Handheld
Power delivery
components
Fast CMOS Voltage Regulator
~97% CMOS-compatible
Efficient inductors
Inductor Magnetic
wires material
Source: Intel
Probabilistic Behavior
Due to variations
Probability
in:
Vdd, Vt, and Temp
Path Delay
Delay
Deterministic
Frequency
# of Paths
# of Paths
Deterministic Probabilistic
Probabilistic
10X variation
~50% total power
Vdd
Vdd
Ip Op Op
Vss
Vss
Tomorrow’s Orientation and
Metal Restrictions
Vdd
Vdd
Ip Op Op
Vss
Vss
The New Playbook
Today: Tommorrw:
• Local optimization, • Global optimization,
single variable multi-variate
• Deterministic tools • Probabilistic tools
and designs and designs
• Transistor density • Energy-balanced
• Freelance layout • Sea-of-transistors