What Is DSP?: Analog Computer

What Is DSP?
a bit loud
Analog Computer
Digital Computer
DSP
DAC OUTPUT
ADC
1010 1001
LECTURE 1 1-1
Copyright  1998, Texas Instruments Incorporated All Rights Reserved
A Typical DSP System
MEMORY
 DSP Chip
 Memory
ADC
 Converters (Optional)
DSP
 Analog to Digital
 Digital to Analog
DAC
 Communication Ports
 Serial
 Parallel
PORTS
LECTURE 1 1-2
Multiply and Add
Add 1+2 = 3 Multiply 5*3 = 15
0001 0 x 8 x 0011 0000

1 x 4 x 0011 0011
+ 0010 0 x 2 x 0011 0000
1 x 1 x 0011 0011
0011 Shifted and
added =
5 multiple times 3
Most Common Operation in DSP MAC Operation
A = B*C + D
Typically 70 Clock Cycles With
E = F*G + A Ordinary Processors
..
.
Multiply, Add, and Accumulate Typically 1 Clock Cycle With
MAC Instruction Digital Signal Processors
LECTURE 1 1-3
Drop in Multiplication Times
TIME (ns)
600
500
400
300
200
100
0 5 ns
1971 1976 1998

YEARS
LECTURE 1 1-4
Digital Computers
von Neuman Machine
A
STORED ARITHMETIC
PROGRAM INPUT/ A = ADDRESS
LOGIC
AND D OUTPUT
UNIT D = DATA
DATA
Harvard Architecture
A A
ARITHMETIC
STORED INPUT/ STORED
LOGIC
PROGRAM OUTPUT DATA
UNIT
D D
LECTURE 1 1-5
An Example
TMS320C31 Architecture
CACHE RAM 0 RAM 1
64 x 32 1K x 32 1K x 32
A23-A0
7 SEPARATE BUSES ( P / D )
D31-D0
DMA SERIAL
PORT 0
PERIPHERAL BUS (P\D)

TIMER 0
MULTIPLIER ADDER
TIMER 1
FLOATING POINT ARITHMETIC

LOGIC UNIT
MULTIPLEXER P = PROGRAM D = DATA
LECTURE 1 1-6
DSP Development
ADD A, B
11100010010100001001 HIGH-LEVEL LANGUAGE

ASSEMBLER
CODE TEST
EMULATOR S/W DESIGN
N
OK?
DSP
Y
PRODUCT
Tools of the Trade
LECTURE 1 1-7
Why Digital Processing?
ADC PROCESS DAC
 Advantages to Digital Processing
 Programmability
 Stability
 Repeatability
 Special Applications
LECTURE 1 1-8
Programmability
 One Hardware = Many Tasks
SOFTWARE 1 LOW-PASS FILTER

SOFTWARE 2
.. SAME
HARDWARE ..
MUSIC SYNTHESIZER
SOFTWARE N MOTOR CONTROL
 Upgradability and Flexibility

 Develop New Code Upgrade
 Analog Solder New Component
LECTURE 1 1-9
Analog Variability
Analog Circuits are affected by

Temperature
Aging
Tolerance of Components
Two Analog Systems using the same design and
components may differ in performance
1k + 10 years = 1.1k
LECTURE 1 1-10
Digital Repeatability
Perfect Reproducibility
 Nearly identical performance from unit to unit
 Performance not affected by tolerance
 No drift in performance due to temperature or aging
 Guaranteed accuracy
A CD player always plays the same music

quality
LECTURE 1 1-11
Performance
Some special functions are best implemented
digitally
 Lossless Compression
 Adaptive Filters  Linear Phase Filters
gain f phase
frequency frequency
f1 f2
LECTURE 1 1-12
Practical DSP Systems
 Hi-Fi Equipment
 Toys
 Videophones
 Modems
 Phone Systems
 3D Graphics
 Image Processing
 And More ...
LECTURE 1 1-13
Analog Advantages
 Low cost and simplicity in some applications
– Attenuators/amplifiers
– Simple filters
 Wide bandwidth (GHz)
 Low signal levels
 Infinite effective sampling rate
– Infinite resolution in frequency
– No aliasing/reconstruction issues
 Infinite resolution in amplitude
– No quantitation noise
LECTURE 1 1-14
Digital Signal Processing (DSP)
Advantages
 Repeatability
– Low sensitivity to component tolerances
– Low sensitivity to temperature changes
– Low sensitivity to aging effects
– Nearly identical performance from unit to unit
– Matched circuits cost less
 High noise immunity

 In many applications DSP offers higher
performance and lower cost
– CD players versus phonographic turntable
LECTURE 1 1-15
Analog’s Place in DSP
 Most transducers are analog by nature
– Microphones, speakers, etc.
 Analog circuits are required to pre-process low
level signals before ADC
 Analog filters may be required to limit the
bandwidth of signals
– Anti-alias (before ADC) and reconstruction filters (after
DAC)
 Analog circuits may be required to drive output
transducers
– A power amplifier is required to enable a DAC to drive
a speaker
LECTURE 1 1-16
Number Systems
 Represent numbers digitally
Decimal 128 64 32 16 8 4 2 1
Digit Number 7 6 5 4 3 2 1
2 2 2 2 2 2 2 2 20
Digit Number 7 6 5 4 3 2 1 0
 Any number can be represented as a series of 1s and 0s
 Decimal 3 in binary
Decimal 0 0 0 0 0 0 2+ 1= 3
Digit Number 7 6 5 4 3 2 1 0
2 2 2 2 2 2 2 2 2
Digit Number 7 6 5 4 3 2 1 0
Binary 0 0 0 0 0 0 1 1 0000 0011
 Decimal 26 in binary
Decimal 0 0 0 16+ 8+ 0 2= 0 26
Digit Number 7 6 5 4 3 2 1 0
2 2 2 2 2 2 2 2 2
Digit Number 7 6 5 4 3 2 1 0
Binary 0 0 0 1 1 0 1 0 0001 1010
LECTURE 1 1-17
Binary and Hex
Decimal 0,1,2,…….,9
16 Decimal 0x10 Hex
Binary 0,1
20 Decimal 0x14 Hex
Hex 0,1,2,……..,A,B,C,D,E,F
 4 bits of binary system is represented by a single hex digit

Decimal 8+ 4+ 2+ 1= 15
2Digit Number 23 22 21 20
Binary 1 1 1 1 1111
Hex F F
 Decimal 26 in binary and hex

Decimal 0 0 0 16+ 8+ 0 2= 0 26
Digit Number 7 6 5 4 3 2 1 0
2 2 2 2 2 2 2 2 2
Digit Number 7 6 5 4 3 2 1 0
Binary 0 0 0 1 1 0 1 0 0001 1010
Hex 1 A 1A
LECTURE 1 1-18
Signed Integers
 Signed magnitude integers
Signed
Decimal Binary
Hex
Sign Number
2 00 00 00 02 0 000 0000 0000 0000 0000 0000 0000 0010
3 00 00 00 03 0 000 0000 0000 0000 0000 0000 0000 0011
-2 80 00 00 02 1 000 0000 0000 0000 0000 0000 0000 0010
-3 80 00 00 03 1 000 0000 0000 0000 0000 0000 0000 0011
LECTURE 1 1-19
Two’s Complement Notation
2Digit number -27 26 25 24 23 22 21 20

Decimal -128 64 32 16 8 4 2 1
Binary 3 0 0 0 0 0 0 1 1
two’s complement
Decimal 0 0 0 0 0 0 +2 +1= 3
calculation
Binary -2 1 1 1 1 1 1 1 0
two’s complement
Decimal -128 +64 +32 +16 +8 +4 +2 +0= -2
calculation
LECTURE 1 1-20
Two’s Complement
 Conversion to two’s complement notation
Binary
Action Decimal
Sign Number
Signed integer -2 1 000 0000 0000 0000 0000 0000 0000 0010
Strip sign bit 0 000 0000 0000 0000 0000 0000 0000 0010
Invert 1 111 1111 1111 1111 1111 1111 1111 1101
Add one 1 1
Two’s complement 1 111 1111 1111 1111 1111 1111 1111 1110
Hex F F F F F F F E
 Two’s complement addition
Two’s Complement Binary

Decimal Hex
Sign Number
-2 FF FF FF FE 1 111 1111 1111 1111 1111 1111 1111 1110
3 00 00 00 03 0 000 0000 0000 0000 0000 0000 0000 0011
-2 + 3 = 1 00 00 00 01 0 000 0000 0000 0000 0000 0000 0000 0001
LECTURE 1 1-21
Fixed-Point Notation
Conventions
 Number range is between 1 and -1
 Decimal point is always in a fixed location (e.g., 0.74, 0.34, etc.)
 Multiplying a fraction by a fraction always results in a fraction and will
not produce an overflow (e.g., 0.99 x 0.9999 = less than 1)
 Successive additions may cause overflow
Why?
 Signal processing is multiplication-intensive
 Fixed-point notation prevents overflow (useful with a small dynamic
range)
 Fixed-point notation is less expensive
How is fixed-point notation realized in a DSP?
 Most fixed-point DSPs are 16 bits
 The range of numbers that can be represented is 32767 to -32768
 The most common fixed-point format is Q15
Q15 Notation
Bit 15 Bits 14 to 0
sign two’s complement number
LECTURE 1 1-22
Q15 Format
Dynamic range in Q15
Number Biggest Smallest
Fractional number 0.999 -1.000
Scaled integer for Q15 32767 -32768
Number representations in Q15

Decimal Q15 = Decimal x 215 Q15 Integer
0.5 0.5 x 32767 16384
0.05 0.05 x 32767 1638
0.0012 0.0012 x 32767 39
Rules for operations

 Avoid operations with numbers larger than 1
2.0 x (0.5 x 0.45) = (0.2 x 0.5 x 0.45) x 10 = (0.5 x 0.45) + (0.5 x 0.45)
 Scale numbers before the operation
0.5 in Q15 = 0.5 x 32767 =16384
LECTURE 1 1-23
Q15 Operations
Addition
Decimal Q15 Scale back
Q15 / 32767
0.5 + 0.05 = 0.55 16384 + 1638 = 0.55
18022
0.5 – 0.05 = 0.45 16384 – 1638 =
Multiplication
2 x 0.5 x 0.45 =
Decimal Q15 Back to Q15 Scale back
Product / 32767 Q15 / 32767
0.5 x 0.45 = 0.225 16384 x 14745 = 7373
241584537
0.225 + 0.225 = 0.45 7373 + 7373 = 0.45
14746
LECTURE 1 1-24
TMS Floating-Point Format
TMS single-precision floating-point format
31 ... 24 23 22 .............. 0 Bit No
e s f
8 bits 1 bit 23 bits
e = exponent is a signed two’s compliment 8-bit field and determines

the location of the binary Q point
s = sign of mantissa (s = 0 positive, s =1 negative)
f = fractional part of the mantissa; an implied 1.0 is added to this fraction
but is not allocated in the bit field since this value is always present
Conversion equations
Binary Decimal Equation
e e
s=0 X = 01.f x 2 X = 01.f x 2 1
e e
s=1 X = 10.f x 2 X = ( -2 + 0.f ) x 2 2
Special case
s=0 X=0 e = -128 Exponent (e)
Decimal 0 1 127 -1 -128
Hex
two’s comp. 00 01 7F FF 80
LECTURE 1 1-25
Floating-Point Numbers
Calculate 1.0e0
In hex 00 00 00 00
In binary 0000 0000 0000 0000 0000 0000 0000 0000
s=0 Equation 1 applies: X = 01.f x2 e
f=0
e=0
01.0 x 20 = 1.0
Calculate 1.5e01
In hex 03 70 00 00
In binary 0011 0111 0000 0000 0000 0000 0000 0000
s=0 Equation 1 applies: X = 01.f x2 e
0011 ... e=3

s111 f = 0.5 + 0.25 + 0.125 = 0.875
X = 01.875 x 23 = 15.0 decimal
LECTURE 1 1-26
More on Floating Point
Calculate -2.0e0
In hex 00 80 00 00
In binary 0000 0000 1000 0000 0000 0000 0000 0000
s=1 Equation 2 applies: X = ( -2.0 + 0.f ) x 2 e
f=0
e=0
( -2.0 + 0.0 ) x 20 = -2.0
Addition
1.5 + (-2.0) = 0.5
Multiplication
1.5e00 x 1.5e01 = 2.25e01 = 22.5
LECTURE 1 1-27
Dynamic Range
Ranges of number systems
Two’s
Numbers Base 2 Decimal Complement
Hex
31
Largest Integer 2 -1 2 147 483 647 7F FF FF FF
31
Smallest Integer -2 -2 147 483 648 80 00 00 00
15
Largest Q15 2 -1 32 767 7F FF
15
Smallest Q15 -2 -32 768 80 00
-23 127 38
Largest Floating Point (2-2 )x2 3.402823 x 10 7F 7F FF FD
127 38
Smallest Floating Point -2 x 2 -3.402823 x 10 83 39 44 6E
 The dynamic range of floating-point representation is very large

 Conclusion
 Largest integer x (1.5 x 10 29 ) ~ = largest floating point
 Largest Q15 x (1.03 x 10 34 ) ~ = largest floating point
LECTURE 1 1-28
Fixed vs. Floating Point
 DSP devices are designed as floating point or fixed point
 Fixed-point devices are usually 16-bits, e.g. TMS320C5x
 Floating-point devices are usually 32-bits, e.g. TMS320C3x
 Floating-point devices usually have a full set of fixed-point instructions
 Floating point devices are easier to program
 Fixed-point devices can emulate floating point in software
Comparison
Characteristic Floating point Fixed point
Dynamic range much larger smaller
Resolution comparable comparable
Speed comparable comparable
Ease of programming much easier more difficult
Compiler efficiency more efficient less efficient
Power consumption comparable comparable
Chip cost comparable comparable
System cost comparable comparable
Design cost less more
Time to market faster slower
LECTURE 1 1-29
TMS320 Family
16-Bit Fixed Point Devices 32-Bit Floating Point Devices
’C1x Hard-Disk Controllers ’C3x Videophones
’C2x Fax Machines ’C4x Parallel Processing
’C2xx Embedded Control

’
Other Devices
’C5x Voice Processing
’C6x Advanced VLIW
’C54x Digital Cellular Processor
Phones Wireless Base
Stations/Pooled
Modems
’C8x Video Conferencing
LECTURE 1 1-30
TMS320C54x Architecture
System control Program address generation Data address generation
interface logic (PAGEN) logic (DAGEN)
ARAU0, ARAU1
PC, IPTR, RC, AR0-AR7
BRC, RSA, REA ARP, BK, DP, SP
PA
B
P
B Memory
and
CA external
B interface
C
B
DA
B
D Peripheral
interface
B
EA
B
E
B
EXP
encoder
X D A B
MUX
T register
T D A P C D T A B C D S B A C D
A
Sign ctr Sign ctr A(40) B(40) Sign ctr Sign ctr Sign ctr
Multiplier (17 y 17) MUX

0 Barrel
ALU(40)
A B shifter
A MU B
A B
Fractional MUX Legen
d: A Accumulator A MUX
B Accumulator B S
C CB data bus
D DB data bus
Adder(40) E EB data bus MSW/LSW
COM select
M MAC unit P
P PB program bus
S Barrel shifter TR E
ZERO SAT ROUND T T register
U ALU N
T
C
LECTURE 1 1-31
ALU Functional Diagram
CB15 - CB0
DB15 - DB0
T
A B T C D S Shifter output (40)

40 40
MUX MUX
SXM Sign ctr Sign ctr SXM
Y X OVM
A B
C16
C
ACC
ALU OVA/OVB
ZA/ZB
MUX TC
40
40 Legend:
A M U B A Accumulator A
40 B Accumulator B
C CB data bus
D DB data bus
MAC M MAC unit
output S Barrel shifter
T T register
U ALU
LECTURE 1 1-32
Two C54x Memory Maps
'541 Program Memory '541 Data Memory
0000h OVLY = 0 0000h-13FFh External 0000h 0000h-005Fh Memory-mapped registers
OVLY = 1 0000h-007Fh Reserved 0060h-007Fh Scratch-pad DARAM
0080h-13FFh On-chip DARAM 0080h-13FFh On-chip DARAM
2000h 2000h
4000h 4000h
1400h-8FFFh External
6000h 6000h
1400h-DFFFh External
8000h 8000h
A000h A000h
MP/MC = 0 9000h-FF7Fh On-chip ROM

FF80h-FFFFh Interrupt vectors
C000h C000h
(internal)
MP/MC = 1 9000h-FF7Fh External

FF80h-FFFFh Interrupt vectors
(external)
E000h E000h
DROM = 0 E000h-FFFFh External
DROM = 1 E000h-FEFFh On-chip ROM

FF00h-FFFFh Reserved
FFFFh FFFFh
LECTURE 1 1-33
Direct Addressing Block Diagram
DP(9)
7 LSBs from IR (dma)
SP(16)
DAB(16) (read)
DAGEN
CPL CPL
0 EA = DP : offset(IR) EAB(16) (write)

1 or
EA = SP + offset(IR)
CAB(16)
(32-bit read)
Data bus DB(16)
Data bus EB(16)
Legend: EA Effective address

IR Instruction register
LECTURE 1 1-34
C54x Program Memory
PAGEN
PC
Repeat registers
RC
BRC
RSA
REA
LECTURE 1 1-35
C54x Pipeline
Loads PAB with Loads IR with the contents Loads DB with the data1
the PC's contents of PB read operand
Decodes the IR's contents Loads CB with the data2
read operand
Loads EAB with the data3
write address, if required
Prefetch Fetch Decode Access Read Execute/write
Loads PB with the Loads DAB with the data1 read Executes the instruction
fetched instruction address, if required and loads EB with write
word Loads CAB with the data2 read data
address, if required
Updates auxiliary registers and
stack pointer
Time
LECTURE 1 1-36
Serial Port Interface Block
Diagram
Data Bus
16 16
Load
(Load) control
DRR (16) logic DXR (16)
16 16
RINT on XINT on
Load (Load)
RSR-DRR DXR-XSR
Control
transfer transfer
Logic
RSR (16) XSR (16)
(Clear) (Clear)
Byte/word Byte/word
counter (Clock) (Clock) counter
FSR FSX
DR CLKR CLKX DX
LECTURE 1 1-37
C54x External Bus Interface
CLKOUT
PB Fetch
CB/DB Reads
EB Write
A(22 - 0)
D(15 - 0) Write Read Read Fetch
LECTURE 1 1-38

What Is DSP?: Analog Computer

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What Is DSP?

0001 0 x 8 x 0011 0000

Most Common Operation in DSP MAC Operation

1971 1976 1998

PERIPHERAL BUS (P\D)

FLOATING POINT ARITHMETIC

MULTIPLEXER P = PROGRAM D = DATA

11100010010100001001 HIGH-LEVEL LANGUAGE

EMULATOR S/W DESIGN

ADC PROCESS DAC

 Advantages to Digital Processing

SOFTWARE 1 LOW-PASS FILTER

SOFTWARE N MOTOR CONTROL

 Upgradability and Flexibility

Analog Circuits are affected by

1k + 10 years = 1.1k

A CD player always plays the same music

 Adaptive Filters  Linear Phase Filters

 High noise immunity

 Any number can be represented as a series of 1s and 0s

 4 bits of binary system is represented by a single hex digit

 Decimal 26 in binary and hex

 Signed magnitude integers

2Digit number -27 26 25 24 23 22 21 20

 Two’s complement addition

Two’s Complement Binary

Number representations in Q15

Rules for operations

e = exponent is a signed two’s compliment 8-bit field and determines

0011 ... e=3

X = 01.875 x 23 = 15.0 decimal

 The dynamic range of floating-point representation is very large

’C1x Hard-Disk Controllers ’C3x Videophones

’C2x Fax Machines ’C4x Parallel Processing

’C2xx Embedded Control

’C8x Video Conferencing

Multiplier (17 y 17) MUX

A B T C D S Shifter output (40)

SXM Sign ctr Sign ctr SXM

MP/MC = 0 9000h-FF7Fh On-chip ROM

MP/MC = 1 9000h-FF7Fh External

DROM = 1 E000h-FEFFh On-chip ROM

7 LSBs from IR (dma)

0 EA = DP : offset(IR) EAB(16) (write)

Data bus DB(16)

Data bus EB(16)

Legend: EA Effective address

Prefetch Fetch Decode Access Read Execute/write

RSR (16) XSR (16)

D(15 - 0) Write Read Read Fetch

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