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Computer Architecture

Ms. Honeylet D. Grimaldo, MEP CpE SY 2011-2012 3rd Trimester

Computer Architecture
Computer Architecture is the theory behind the operational design of a computer system This is a term which is applied to a vast array of computer disciplines ranging from low level instruction set and logic design, to higher level aspects of a computers design such as the memory subsystem and bus structure

Von Neumann Architecture

Stored Program Architecture or the

Fetch-Decode-Execute Architecture.

Von Neumann Criteria:

It has three basic hardware subsystems: a CPU, a main memory system, and an I/O system. It is a storedprogram computer. Programs (together with data) are stored in main memory during execution. It carries out instructions sequentially. It has, or at least appears to have, a single path between the main memory and the control unit of the CPU.

Flynns Classification of Computers

(in terms of multiplicity of instruction-data

streams) is the most universally accepted method of classifying computers. Instruction Stream (IS) a sequence of instructions as executed by a machine. Data Stream (DS) a sequence of data including input, partial, or temporary results, called for by the instruction stream.

Four broad categories:

SISD (Single Instruction Stream over a

Single Data stream) SIMD (Single Instruction Stream over a Multiple Data stream) MIMD (Multiple Instruction Stream over a Multiple Data stream) MISD (Multiple Instruction Stream over a Single Data stream)

SISD (Single Instruction Stream over a Single Data stream)

An SISD machine is a conventional

sequential machine (Von Neumann). A program executed by the processor constitutes the single instruction stream, and the sequence of data items that it operates on constitutes the single data stream.

SIMD (Single Instruction Stream over a Multiple Data stream)

A single stream of instructions is broadcast to a number of processors. Each processor operates on its own data. The multiple data streams are the sequences of data items accessed by the individual processors in their own memories. In other words, an SIMD computer has several processors running the same program in lockstep but each operating on different sets of data. This type of processing is also called array processing.

MIMD (Multiple Instruction Stream over a Multiple Data stream)

These are the parallel computers

(multiprocessor and multiple computer systems). They involve a number of independent processors, each executing a different program and accessing its own sequence of data items (or the same program and the same data but not in lockstep as in SIMD machines).

MISD (Multiple Instruction Stream over a Single Data stream)

A common data structure is manipulated

by separate processors, and each executes a different program. This is also known as systolic arrays for pipelined execution of specific algorithms. This form of computation does not arise often in practice.

The Clock

clock is a signal that keeps the control unit moving. At each clock tick, control unit moves to the next machine cycle -- may be next instruction or next phase of current instruction.

Clock generator circuit:


on crystal oscillator Generates regular sequence of 0 and 1 logic levels Clock cycle (or machine cycle) -- rising edge to rising edge

Clock Cycles

of reporting execution time in seconds, we often use cycles


ticks indicate when to start activities (one abstraction): time = time between ticks = seconds per cycle clock rate (frequency) = cycles per second (1 Hz. = 1cycle/sec)


Turnaround Time
The simplest measure of program

performance is the turnaround time (the interval from the time of submission to the time of completion. It is the sum of the periods spent for disk and memory accesses, I/O activities, compilation time, OS overhead, and CPU time).

clock rate or clock frequency (f in megahertz)

The size of the program is determined by its Instruction Count (Ic), in terms of the number of machine instructions to be executed in the program. The inverse of the clock rate is the period or cycle time ( = 1/f in seconds). The CPU Time (T in seconds/program) needed to execute the program is estimated by finding the product of the three contributing factors: CPU Time (T) = Ic CPI

Some Definitions

= Cycles Per Instruction = Cycle Time Ic = Instruction Count T = CPU Time

A 40-MHz processor was used to execute

a program with 50,000 instructions. The average CPI is estimated to be 3.5 cycles/instruction. Calculate the total execution time. Solution #1

A 40-MHz processor was used to execute a

benchmark program with the following instruction mix and clock cycle counts:

Determine the effective CPI and execution time

for this program. Solution#2


Pentium has a 233 MHz clock 2.33 x 108 clock cycles per second (MHz = 106). What is the cycle time? Solution#3 My 80486 computer runs at 66MHz. What is the cycle time?Solution#4 A computer has a 2.5ns cycle time. What is the number of cycles per second? Solution#5

Memory Cycle
defined as the time needed to complete

one memory reference (read or write). Usually, a memory cycle is k times the processor cycle . The value of k depends on the speed of the memory technology and processor-memory interconnection scheme used.

The CPI of an instruction can be divided into two component terms corresponding to the total processor cycles and memory cycles needed to complete the execution of the instruction. CPU Time (T) = Ic (p + m k) where: p is the number of processor cycles needed for the instruction decode and execute m is the number of memory references needed k is the ratio between memory cycle and processor cycle

The System Bus


system bus connects the microprocessors to the memory and I/O subsystems It is comprised of three major busses: address bus, the data bus, and the control bus Both address and data busses come in variety of sizes.


Address busses generally range from 20 to 36 bits (1 MB address space 64 GBytes) Data busses are either 8, 16, 32, or 64 bits wide The control bus on the other hand varies amongst processors. It is a collection of control signals with which the processor communicates with the rest of the system

The Control Bus

The following are generally part of the Control Bus: Read/Write signal, which specify the direction of data flow Byte Enable signals, which allow 16, 32, and 64 bit busses deal with smaller chunks of data Some processors have signaling which identifies between memory and I/O addresses Other signals include interrupt lines, parity lines, bus clock, and status signals


Solution #2


=1/f = 1 / 2.33 x 108 cycles/ second = 4.3 x 10-9 seconds = 4.3 ns


=1/f = 1 / 66 x 106 cycles/ second =?


= 2.5 ns f= ?
f= 1 / f = 1 / 2.5 ns f= ?


processor speed is often measured in terms of million instructions per second. Let C be the total number of clock pulses or cycles needed to execute a given program. C = Ic x CPI

Derivation of the formula

CPU Time (T) = Ic

x CPI x (cycle time)

=Cx =C/f

The equation for the MIPS rate is:


/ (T x 106)

x CPI x (cycle time), then the second equation for MIPS is: MIPS = f / (CPI x 106) Since CPI = C / Ic, then a third equation for MIPS is: MIPS = (f x Ic) / (C x 106)
Since T = Ic

A 40-MHz processor was used to execute

a benchmark program with the following instruction mix and clock cycle counts:

Determine the MIPS Rate.

From the previous example

Ic = 100,000 instructions T = 3.875 ms


/ (T x 106)

= 100,000 / (3.875 x 10-3 x 106) = 25.81 MIPS