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Silicon Manufacturing

Lithography

Lithography
Lithography is a technique that is used to define the shape of micro-machined structures on a wafer. It is the process of selective removal of oxide in desired area and then performing diffusion

Different types of Lithography are


1. Photo Lithography:- uses UV rays 2. Fine Line Lithography: uses other types of radiation
1. X Ray Lithography 2. Electron Beam Lithography 3. Ion Beam Lithography

Lithography area in clean room

Photolithographic Process Steps


1. Photo Resist Application( Spinning)
Photoresist is a special resin similar in behavior to photography films that changes properties when exposed to light. A resin called "photoresist" is applied to Si wafer which is held down by vaccum chuck. The Si wafer is then accelerated to a rotational velocity in the range of 3000 to 7000 rpm

- The spinning process produce a thin( ~1m thick coating), uniform coat of photo resist and spins off the excess liquid - Some times a Bake out ( 100 degreeCelsius) is given prior to photo resist application in order to drive off moisture from wafer surface 2. Pre Bake - Si wafer coated with photo resist is put in to an oven at 80degreeCelsius for around 30 to 60min - This is done to drive off the solvent and harden the photo resist to a semi solid film

3. Alignment & Exposure


The first step in this process is to develop a

photomask, which will be typically be a chromium pattern on a glass plate. It has clear & opaque areas. Now the Si wafer is brought in close proximity( 25 125MicroMeter) to the photo mask using a mask aligner. The photo mask should correctly line up with reference mark or pre existing pattern on the wafer( < 1 0r 0.5MicroMeter) After proper alignment is achieved, mask is brought in to contact with photo mask

Masking/Exposure
The photoresist is exposed through the pattern on the mask with a high intensity ultraviolet light( 3 to 10 secc). There are three primary exposure methods: contact, proximity, and projection

4. Patterning: Development
Photoresist is developed which transfers the pattern on the mask to the photoresist layer.

The photoresist chemically reacts and dissolves in the developing solution, only on the parts that were not masked during exposure (positive method). Development is performed with an alkaline developing solution. After the development, photoresist is left on the wafer surface in the shape of the mask pattern.

Photoresist
There are two basic types of Photoresists:- Positive and Negative.

Positive resists.
In these resists, exposure to the UV light changes the chemical structure of the resist so that it becomes more soluble in the developer. The exposed resist is then washed away by the developer solution, leaving windows of the bare underlying material. The mask, therefore, contains an exact copy of the pattern which is to remain on the wafer.

Negative resists
Exposure to the UV light causes the negative resist to become polymerized, and more difficult to dissolve. Therefore, the negative resist remains on the surface wherever it is exposed, and the developer solution removes only the unexposed portions. Masks used for negative photoresists, therefore, contain the inverse (or photographic "negative") of the pattern to be transferred.

5. Post Bake
After development and rinsing the wafers are usually given a post bake in an oven at 150degreeCelsius for about 30 t0 60 mins It is done
For better adhesion of remaining resist to the wafer and to make it more resistant to the HF acid solution used for etching purpose

6. Oxide Etching
"Etching" refers to the physical or chemical etching of oxide films and metallic films using the resist pattern as a mask. Etching with liquid chemicals is called "wet etching" and etching with gas is called "dry etching". Wafers are immersed in a diluted solution of 10:1, H2O : HF or 10 : 1 NH4F : HF

7. Photoresist Stripping
The photoresist remaining on the wafer surface is no longer necessary after etching is complete. The remaining resist is stripped off or removed using a mixture of sulphuric acid & hydrogen peroxide with the help of abrasion process. A follow-up washing and drying step is also done to remove the residues and non-volatile contaminants that remains after ashing

Photolithography Photomasks
Photomask This is a square glass plate with a patterned emulsion of metal film on one side. The mask is aligned with the wafer, so that the pattern can be transferred onto the wafer surface. Each mask after the first one must be aligned to the previous pattern.

Photomasks Printing Techniques

Contact Printing
Photomask is pressed against resist coat wafer with a pressure typicaly in the range of 0.05atm to 0.3atm and exposed to light of wavelength near 400nm Resolution <1m linewidth is possible Masks can only be used a limited no: of times bcoz its surface get scrathed by alignment process

Proximity Printing or Shadow Printing


There exist a gap b/w mask and wafer in the range of 20 to 50m Longer mask life Mask and wafer are placed in an equipment called projection aligner and brought to the close proximity with the help of a microscope Resolution possible is only 2 - 4m. It is a function of distance b/w wafer & mask Line width control is more difficult than contact printing

Projection Printing
Image is projected via a s/m lenses on to the wafer Mask can be used a large no: of times( limited to 100,000 times) Reduced cost per wafer High resolution than proximity printing Costliest of all other conventional s/m If greater packing density or large wafer processing is required this method will not work well

Direct-Step-On Wafer( DSW) Projectors


0.7 to 1.0 m resolution is obtained

0.35 t0 0.2 m line width is possible

Epitaxy
It is an arrangement of atoms upon a crystal substrate so that the added layer structure is an exact extension of the substrate crystal structure. It is a process to grow a single crystal layer on a single crystal substrate Diff b/w epitaxy & crystal growing Epitaxy is a special case of CVD 2 types:- homoepitaxy & heteroepitaxy

Uses of Epitaxy To enhance performance of discrete bipolar transistors( to grow a high resistivity layer on a low resistivity substrate for high breakdown voltage of collector) To improve performance of DRAM devices & CMOS ICs To prepare compound SC materials such as GaAs, InP, InGaAs etc To prepare devices like LED, HBT, MODFET etc To provide isolation

Epitaxial Growth Technique:- Vapour Phase Epitaxy( VPE Process)


4 silicon sources used for growing epitaxial Si are SiCl4, SiH2Cl2, SiHCl3 & SiH4
1. 2. 3.
4.

SiCl4 + 2H2 Si + 4HCl SiH2Cl2 Si + 2HCl SiHCl3 + 2H2 Si + 2HCl SiH4 Si + 2H2

Initialy reactor is purged by nitrogen or hydrogen for a short period and followed by a vapour HCL etching at elevated temperature Temperature is then reduced to the growth temperature( 1150 1250degreeCelsius) The reactant and Carrier gases are then introduced in to the growth reactor These chemical agents undergo a no:of chemical & physical reactions which result in epi-layer deposition SiCl4 is non-toxic, inexpensive and easy to purify. Also does not react with boat and chamber walls. But not suitable for step junction and requires high temp than Silane process

Epitaxial Reactors
Epitaxial layer deposition takes place in a chamber called epitaxial reactors. 3 basic types are 1)Horizontal reactor 2) Vertical Reactors & 3) Cylindrical Reactors Rf induction heating is used Si wafers are placed on Silicon carbide coated graphite susceptor which serves as single turn secondary winding A water cooled Cu induction coil serves as primary winding The voltage induced in susceptor produces Eddy current which raises the temperature due to heating produced by I2R power losses. The gas distribution s/m is used to feed diff gases

Horizontal Reactor:- Low cost construction but controlling deposition over the entire length is a problem

Vertical Reactors:- very uniform deposition but suffer from mechanical complexity Cylindrical Reactors:- uniform deposition but not suited for extended operation at temp > 1200degCelsius

Chemical Vapour Deposition


CVD is the deposition of a solid material on to a heated substrate via decomposition or chemical reaction of compounds contained in the gas passing over the substrate Materials to be deposited enter a reaction chamber in the gaseous or vapour phase and react on or near the substrate surface at some elevated temp The chemical reaction that occurs produces the atoms or molecules that are deposited on the substrate surface

Uses Of CVD
CVD can be used for the deposition of SiO2, SiN3, poly-Si, Deposition of Si on Sapphire( hetroepitaxy) and to deposit metals

Epitaxy v/s CVD


Epitaxy is a high temp process and deposit a single crystalline Si over a single crystalline Si wafer CVD usualy deposit poly- Si on single crystal Si wafer at temp less than that required for epitaxy Epitaxy is a special case of CVD CVD v/s Oxidation CVD deposits oxides at a faster rate and at lower temp. But oxide quality is not good as produced by oxidation

CVD Process Steps


1. Transport of reacting gaseous species to the substrate surface 2. Absorption of species on the substrate surface 3. Heterogeneous surface reaction catalysed by the substrate surface 4. Desorption of gaseous reaction bye-products 5. Transport of reaction bye-product away from the substrate surface VPE process and CVD process steps are same

CVD Methods 1. Low Pressure CVD( LPCVD)


Used to deposit poly silicon, SiO2, Si3N4 Consist of a quartz tube heated by a 3 zone furnace Pressure in the chamber are 30 to 250Pa Operates in surface reaction rate limited mode Temp range 300 900degCelsius 50 200 wafers can be processed Wafer stand perpendicular, vertical to gas flow Advantages: Excellent uniformity, good through put, low cost Large load space, no carrier gas required thus reduced particle contamination Ability to accommodate large diameter wafers

Hot Wall reduced Pressure reactor

Dis Adavantages:- low deposition rate, frequent use of toxic , corrosive or flammable gases, high operating temp

2. Atmospheric Pressure CVD( APCVD)


Operate in mass transport limited regime Wafers are placed horizontally and moved under a gas stream so that uniform film deposition is made Samples are carried through a conveyor belt High susceptibility of wafers to the falling contaminant particles Used to deposit dielectrics and poly-Si films

Advantages:- Simple reactor design, high film deposition rate, High throughput, good uniformity & ability to handle large diameter wafers

Continuous Atmospheric Pressure reactor

DisAdavantages:- fast gas flows are required, reactors must be cleaned frequently

3. Plasma Enhanced CVD( PECVD)

Parallel Plate Plasma Deposition reactor

Advantages:- low deposition temp, can enhance deposition rate DisAdavantages:- limited capacity, wafer must be loaded and unloaded individualy, particles can be formed while electrode assembly is being inserted

Plasma generated by rf field create free electrons in the discharge region This free electrons gain energy from electric field and ionize the gaseous reactants which gets adsorbed on film surface Due to electron & ion bombardment atoms rearrange and a film is deposited on the surface Bye products are desorbed

Metalization
Metalization is used to create contacts with the silicon and to make interconnections on the chip Desired properties are
low resistivity( in ohms/square) Easy to form and etch Mechanical stability & good adhesion to silicon and insulators Surface smoothness good coverage of steps in chip surface immunity to corrosion & should be stable in oxidizing ambient ductility (so temperature cycles dont cause failures)

Advantages of Al metallization
Good conductivity Easy to deposit thin films of Al by vaccum evaporation Good adherence to SiO2 surface Al forms good mechanical bonds with Si Forms low resistance contacts Can be applied with a single deposition & etching process Metallization Applications in VLSI 1. Gates for MOSFETS 2. Contacts 3. Interconnects

Metallization Process
1. CVD( Chemical Vapour Deposition) 2. PHD( Physical Vapour Deposition) 2 types of PVD methods are evaporation & Sputtering. Both have 3 identical steps 1. Converting condensed phase in to vapour phase 2. Transporting vapour phase from source to substrate 3. Condensing vapour source on the substrate

Metallization Patterning
Lift Off Process: Photolithogra phic process is used to produce pattern of required inter connection & bonding pads on the Al film Most commonly used Al etchant is H3PO4

Back End Processing


Wafer Inspection, Dicing, WireBonding & Packaging

Wafer Inspection
Each IC on the completed wafer is electronically tested by the tester
Defective IC Individual integrated circuits are tested to distinguish good die from bad ones.
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Dicing
Each wafer contains many individual chips:- 5mm to 15 mm square. Chips are scribed with a diamond saw or diamond-tipped scribe, or a laser, and fractured along the scribe lines into chips.

Mounting and Assembly


After the IC chips are cut apart, they are sealed into packages. The IC chips must first be attached to a platform called the "lead frame.

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Mounting

Die Attach and Wire Bonding

Each chip is cemented into a package Wire leads from pins on the package to bonding pads on the chip are installed A cover is cemented over the cavity and marked

Die Attach and Wire Bonding


lead frame
gold wire

bonding pad

connecting pin

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Wire bonding
The mounted IC chips are connected to the lead frames.

Encapsulation
The IC chips and the lead frame islands are encapsulated with molding resin for protection.

Printing and Lead Finish


The final step of IC chip manufacturing is the printing onto the package surface and the finishing of leads. After this step, the IC chips are complete.

Final Test
Chips are electrically tested under varying environmental conditions.

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Package & Mounting Types


Packaging affects overall cost, performance and reliability of the packaged chip or die. Diff packaging types are: Dual-In Line package Through hole packages Pin Grade Array Package J leaded package Gull Wing leaded Package Surface mounted Butt leaded Package packages Leadless type

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