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KL3193
SERIAL I/O
BASIC
CONCEPTS
1 Iskandar Yahya
iskandar@vlsi.eng.ukm.my
03-89216591
EXTRA LECTURE…….
4
SERIAL I/O
BASIC CONCEPTS OF SERIAL I/O
This section:
Interfacing requirements
Alphanumeric codes
Transmission format
Interfacing Requirements:
The interfacing requirements for serial I/O is more or
less the same as parallel I/O.
MPU identifies the device through the port address
and use Read and Write control signal to control it
accordingly.
But instead of using the entire data bus, serial I/O
uses only one data line
MPU select I/O device through Chip Select
Address decoding can either be Peripheral I/O or
Memory Mapped I/O
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SERIAL I/O
BASIC CONCEPTS OF SERIAL I/O
Alphanumeric Codes
Binary representation of alphabets and numbers as on
your keyboard
Coding used: ASCII (American Standard Code for
Information Interchange)
7-bit code with 128(27) combinations, each
combination from 00H to 7FH is assigned to a letter, a
decimal number, a symbol or a machine command
Refer Appendix E page 735 of Gaonkar book
Devices that use ASCII: Printers, teletype machines,
keyboards
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SERIAL I/O
BASIC CONCEPTS OF SERIAL I/O
Transmission Format
Synchronous Vs. Asynchronous Transmission
Synchronous
Transmitter and receiver are synchronized
A block of characters is transmitted along with the
synchronization information
Clock
Tx S
ync
S
ync
Rx
Data
Start Time
8
SERIAL I/O
BASIC CONCEPTS OF SERIAL I/O
Transmission Format
Synchronous Vs. Asynchronous Transmission
Asynchronous
Character oriented, one character is sent at a time
Each character carries the Start and Stop
information
Framing - A low Start bit followed by eight
character bits and ends with two Stop bits
Marking
Start
Stop
Tx D0 D1 D2 D3 D4 D5 D6 D7
Bits Rx
CLK ASCII CLK
Character
Time 9
SERIAL I/O
BASIC CONCEPTS OF SERIAL I/O
10
SERIAL I/O
BASIC CONCEPTS OF SERIAL I/O
Parity Check
An ACSII code contains 8-bit character data. The
number of 1's can either be an odd number or even
number
D7 bit (MSB) is used to flag whether there is an odd or
even number of 1's.
In Even parity system:
14
SERIAL I/O
ERROR CHECK IN DATA COMMUNICATION
Checksum
15
SERIAL I/O
ERROR CHECK IN DATA COMMUNICATION
21
SERIAL I/O
REVIEW OF IMPORTANT CONCEPTS
Software approach:
Speed of transmission is set up by using an
appropriate delay between the transmission
consecutive bits, set up by the software
The entire word is converted into a serial stream by
rotating the byte and outputting one bit at a time,
including the framing bits and the parity bits.
Suitable for slow-speed asynchronous data
communication where timing requirements are not
critical
Simple and inexpensive
Useful in understanding the concepts of serial I/O
22
SERIAL I/O
REVIEW OF IMPORTANT CONCEPTS
Hardware approach:
Use peripherals to (PPD) for data transfer
The device contain parallel-to-serial register and 1-
bit output port for transmission
For reception, use serial-to-parallel register and 11-
bit input port
Rate of transmission and reception is determined
by the clock
Data framing and adding error checking
information can be programmed on a control
register
MPU only transfer data in parallel data bus, the
programmable device/block does the serial I/O
functions 23
Flexible and reprogrammable
Widely used in industrial and commercial products
SERIAL I/O
SOFTWARE-CONTROLLED ASYNCHRONOUS SERIAL I/O
24
SERIAL I/O
SOFTWARE-CONTROLLED ASYNCHRONOUS SERIAL I/O
•Set up
Character Bit Read Output
Counter Port
•Send Start Bit
NO Is It
Wait Bit Time Start
Bit?
YES Return
Get Character
in Accumulator Wait For Half
Bit Time
•Check Parity if
Output Bit Necessary
NO Is Bit •Wait for Two
Using D0 Still
Stop Bits
Low
Return
YES
Wait Bit Time YES
•Set up Bit Is It
NO
Counter Last
•Rotate Next •Add Parity if •Clear Register to Bit?
Bit in D0 Necessary Save Bits
• Decrement •Send Two Stop
Bit Counter Bits •Get Ready To
• Wait Bit Time
Receive Next
• Read Input
Bit
Port
Is It •Decrement
NO • Save Bit
Last Counter
Bit?
Set the counter for 11 bits and repeat the loop 11 times.
The Start and Stop bits are included with the character.
For Stop bits, the 2 1's are set up by instruction STC (set
31
carry)
Example in transmitting the ASCII letter G stored in
register B:
SERIAL I/O LINES
SOD AND SID SERIAL I/O LINES
*Content of register B: 47H (01000111)
CY D7 D6 D5 D4 D3 D2 D1 D0 (A)
XRA 0 0 0 0 0 0 0 0 0
MVI A,80H 0 1 0 0 0 0 0 0 0
RAR 0 0 1 0 0 0 0 0 0
SIM 0 ----> sent out (SOD) Start Bit
STC
MOV A,B 1 0 1 0 0 0 1 1 1
RAR 1 1 0 1 0 0 0 1 1
MOV B,A 1 1 0 1 0 0 0 1 1 (B)
2nd iteration:
MVI A,80H 1 1 0 0 0 0 0 0 0
RAR 0 1 1 0 0 0 0 0 0
SIM 1 ----> sent out (SOD) bit D0 of ASCII
STC
MOV A,B 1 1 0 1 0 0 0 1 1
RAR 1 1 1 0 1 0 0 0 1 33
Problem:
Receive an ASCII character from an input port
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SERIAL I/O LINES
SOD AND SID SERIAL I/O LINES
Solution Subroutine:
Control logic
Transmitter:
Accepts parallel data from 8085 and converts it to serial data
stream
Two registers; a buffer register to hold the 8-bit data and an
output register to converts the data into serial stream
MPU writes on the buffer, and if the output register is
38
available, the contents of buffer is transferred to the output
register.
SERIAL I/O
HARDWARE CONTROLLED SERIAL I/O
Receiver:
Accepts serial data and converts them into parallel data.
39
SERIAL I/O
HARDWARE CONTROLLED SERIAL I/O