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DIGITAL CIRCUITS
CHAPTER 2:
COMBINATIONAL LOGIC CIRCUITS
15 October 2006
OVERVIEW
F(vars) = expression
Operators ( +, •, ’ )
Variables
set of binary Constants ( 0, 1 )
variables Groupings (parenthesis)
AND (also • , Λ)
OR (also + , V)
NOT (also ’ , - )
t0 t1 t2 t3 t4 t5 t6
1
Input A 0
1 Transitions
signals B
0
1
Gate F=A•B 0 Basic
Assumption:
1
Output G=A+B 0 Zero time for
Signals 1
signals to
H=A’ 0 propagate
Through gates
October 17, 2008 Chapter 2. Combinational Logic Circuits 10
Combinational Logic Circuit
from Logic Function
Consider function F = A’ + B•C’ + A’•B’
A combinational logic circuit can be constructed to
implement F, by appropriately connecting input signals
and logic gates:
Circuit input signals from function variables (A, B, C)
Circuit output signal function output (F)
Logic gates from logic operations
A F
A F
B G
A
October 17, 2008 Chapter 2. Combinational Logic Circuits 13
BOOLEAN ALGEBRA
3. X+X = X -- Idepotence
4. X•X = X -- Idepotence
5. X + X’ = 1 -- Complement
6. X • X’ = 0 -- Complement
7. (X’)’ = X -- Involution
1. X + 0 = X 2. X • 1 = X (dual of 1)
3. X + 1 = 1 4. X • 0 = 0 (dual of 3)
5. X + X = X 6. X • X = X (dual of 5)
7. X + X’ = 1 8. X • X’ = 0 (dual of 8)
In general,
( X1 + X2 + … + Xn )’ = X1’•X2’ • … •Xn’,
and ( X1•X2•… •Xn )’ = X1’ + X2’ + … + Xn’
1. x + x•y = x
2. x•(x+y) = x (dual)
Proof:
x + x•y = x•1 + x•y
= x•(1+y)
= x•1
=x
QED (2 true by duality)
xy + x’z + yz = xy + x’z
(x+y)•(x’+z)•(y+z) = (x+y)•(x’+z) -- (dual)
Proof:
xy + x’z + yz = xy + x’z + (x+x’)yz
= xy + x’z + xyz + x’yz
= (xy + xyz) + (x’z + x’zy)
= xy + x’z
QED (2 true by duality).
right. 1 1 1 1 0 1
October 17, 2008 Chapter 2. Combinational Logic Circuits 22
Truth Tables (cont.)
Example: Prove
x’y’z’ + x’yz’ + xyz’ = x’z’ + yz’
Proof:
x’y’z’ + x’yz’ + xyz’
= x’y’z’ + x’yz’ + x’yz’ + xyz’
= x’z’(y’+y) + yz’(x’+x)
= x’z’•1 + yz’•1
= x’z’ + yz’
QED.
Canonical Sum-Of-Products:
The minterms included are those mj such
that F( ) = 1 in row j of the truth table for
F( ).
Canonical Product-Of-Sums:
The maxterms included are those Mj such
that F( ) = 0 in row j of the truth table for
F( ).
f1(a,b,c) = (a+b+c)•(b’+c’)•(a’+c’)
= (a+b+c)•(aa’+b’+c’)•(a’+bb’+c’)
= (a+b+c)•(a+b’+c’)•(a’+b’+c’)•
(a’+b+c’)•(a’+b’+c’)
=
a+b+c)•(a+b’+c’)•(a’+b’+c’)•(a’+b+c’)
October 17, 2008 Chapter 2. Combinational Logic Circuits 41
Karnaugh Maps
2 3 OR 1 3
1 m2 m3 1 m1 m3
yz
00 01 11 10
x
0 1 3 2
0 m0 m1 m3 m2
4 5 7 6
1 m4 m5 m7 m6
group of 4 terms
October 17, 2008 Chapter 2. Combinational Logic Circuits 48
Simplification
yz
X 00 01 11 10
f1(x, y, z) = ∑ m(2,3,5,7)
0 1 1
f1(x, y, z) = x’y + xz 1 1 1
f2(x, y, z) = ∑ m (0,1,2,3,6)
f2(x, y, z) = x’+yz’ 1 1 1 1
1
00 m0 m1 m3 m2
01 m4 m5 m7 m6
10 m8 m9 m11 m10
DE
A=1
BC
16 17 19 18
DE
20 21 23 22
BC
0 1 3 28 2 29 31 30
4 5 7 24 6 25 27 26
12 13 15 14
ABCDE’
8 9 11 10
A=0 A’BCDE’
f(a,b,c,d) =
∑m(0,1,2,3,4,5,7,14,15). cd
ab
Five grouped terms, not all 1 1 1 1
needed. 1 1 1
3 shaded cells covered by only 1 1
one term
3 EPIs, since each shaded cell is
covered by a different term.
F(a,b,c,d) = a’b’ + a’c’ + a’d + abc
cd
ab
1 1 1 1
1 1 1 0
0 0 1 1
0 0 0 0
f = a’c’d+ab’+cd’+a’bd’ 1 1 0 1
0 0 x x
The middle two terms are EPIs,
1 1 x x
while the first and last terms are
selected to
0 1 0 1
cover the minterms m1, m4, and m5.
1 1 0 1
(There’s a third solution!)
0 0 x x
1 1 x x
October 17, 2008 Chapter 2. Combinational Logic Circuits 64
Another Example cd
ab
x 1 0 0
1 x 0 x
Simplify the function 1 x x 1
g(a,b,c,d) whose K-map 0 x x 0
is shown at right. x 1 0 0
g = a’c’+ ab 1 x 0 x
1 x x 1
or
0 x x 0
g = a’c’+b’d
x 1 0 0
1 x 0 x
1 x x 1
0 x x 0
October 17, 2008 Chapter 2. Combinational Logic Circuits 65
Algorithmic minimization
Y Y
X Y F = XY X Y F = X+Y
X F=X’
0 0 0 0 0 0
0 1
0 1 0 0 1 1
1 0
1 0 0 1 0 1
1 1 1 1 1 1
X X
X F F F
Y Y
X Y F = (XY)’ X Y F = (X+Y)’
X F=X
0 0 1 0 0 1
0 0
0 1 1 0 1 0
1 1
1 0 1 1 0 0
1 1 0 1 1 0
Y 1 0 1
1 1 0
X Y F = (X⊕Y)’
XNOR: “equal” gate 0 0 1
0 1 0
X F 1 0 0
Y 1 1 1
F = (X•X)’ X F = X’
X
= X’+X’
= X’
X X
F = ((X•Y)’)’ F X•Y
Y = (X’+Y’)’
Y
= X’’•Y’’
= X•Y
X X
F = (X’•Y’)’ F = X+Y
= X’’+Y’’
Y Y
= X+Y
C’ X Y
C=1 and C’=0
(b) X TG Y
X TG Y
X Y
C C=0 and C’=1 C
(a) (c) (d)
Exclusive OR F = A ⊕ C
0 0 No path Path 0
C F 0 1 Path No path 1
1 0 No path Path 1
TG1 1 1 Path No path 0
(a) (b)