COMPUTER ORGANIZATION

Term:2008-2009
II B.Tech II semester
Unit-I PPT SIides
Text Books: (1) Computer Systems Architecture
by M. Morris Mano (Chapter Three)
(2) Computer Organization
by CarI Hamacher (Chapter One)
INDEX
UNIT-I PPT SLIDES
SrI. No. ModuIe as per Session pIanner Lecture No. PPT SIide No.
1. Computer types
2. Functional unit
3. Basic Operational concepts
4. Bus Structure
5. Software
6. Performance
7. Multi processors and Multi Computers
8. Data Representation
9. Fixed Point Representation
10. Floating-Point Representation
11. Error detection codes
Computer Types
Digital Computer is a Iast electronic calculating machine
that
accepts digitized input inIormation,
processes it according to a list oI internally stored
instructions,
and produces the resulting output inIormation.
Many types oI computers exist that diIIer widely in Size,
Cost,Computational Power and intended Use
1. Personal Computer/ Desktop computers
2. Portable Notebook Computers
3. Work Stations
4. Enterprise System Servers
5. Super Computers
igure 1.1 Block diagram of a digital computer.
unctional Units
Functional Units
A digital computer consists of five functionally
independent parts.
nput
Output
Memory Unit
Arithmetic and Logic Unit
Control Unit
NPUT UNT: computers accept coded
information through input units, which
reads the data. Ex: Keyboard, Mouse, joy
sticks.
Output Units:
TabIe (1.1) Basic identities of Boolean Algebra.
DATA REPRESENTATON
Information that a Computer is deaIing with
* Data
- Numeric Data
Numbers( Integer, reaI)
- Non-numeric Data
Letters, SymboIs
* ReIationship between data eIements
- Data Structures
Linear Lists, Trees, Rings, etc
* Program(Instruction)
NUMERC DATA REPRESENTATON
R = 10 DecimaI number system, R = 2 Binary
R = 8 OctaI, R = 16 HexadecimaI
Radix point(.) separates the integer
portion and the fractionaI portion
Data
Numeric data - numbers(integer, reaI)
Non-numeric data - symboIs, Ietters
Number System
NonpositionaI number system
- Roman number system
PositionaI number system
- Each digit position has a vaIue caIIed a weight
associated with it
- DecimaI, OctaI, HexadecimaI, Binary
Base (or radix) R number
- Uses R distinct symboIs for each digit
- ExampIe A
R
= a
n-1
a
n-2
... a
1
a
0
.a
-1
.a
-m
- V(A
R
) =

1 3
2

# ,
POSTONAL NUMBER SSTEM N
DGTAL COMPUTERS ?
Major Consideration is the COST and TIME
- Cost of buiIding hardware
Arithmetic and Logic Unit, CPU, Communications
- Time to processing
Arithmetic - Addition of Numbers - Table for Addition
* Non-positionaI Number System
- TabIe for addition is infinite
--> ImpossibIe to buiId, very expensive even
if it can be buiIt
* PositionaI Number System
- TabIe for Addition is finite
--> PhysicaIIy reaIizabIe, but cost wise
the smaIIer the tabIe size, the Iess
expensive --> Binary is favorabIe to DecimaI
0 1
0 0 1
1 1 10
0 1 2 3 4 5 6 7 8 9
0 0 1 2 3 4 5 6 7 8 9
1 1 2 3 4 5 6 7 8 9 10
2 2 3 4 5 6 7 8 9 1011
3 3 4 5 6 7 8 9 101112
4 4 5 6 7 8 9 10111213
5 5 6 7 8 9 1011121314
6 6 7 8 9 101112131415
7 7 8 9 10111213141516
8 8 9 1011121314151617
9 9 101112131415161718
Binary Addition TabIe
DecimaI Addition TabIe
REPRESENTATON OF NUMBERS -
POSTONAL NUMBERS
DecimaI Binary OctaI HexadecimaI
00 0000 00 0
01 0001 01 1
02 0010 02 2
03 0011 03 3
04 0100 04 4
05 0101 05 5
06 0110 06 6
07 0111 07 7
08 1000 10 8
09 1001 11 9
10 1010 12 A
11 1011 13 B
12 1100 14 C
13 1101 15 D
14 1110 16 E
15 1111 17 F
Binary, octaI, and hexadecimaI conversion
1 0 1 0 1 1 1 1 0 1 1 0 0 0 1 1
1 2 7 5 4 3
A 6 3
OctaI
Binary
Hexa
CONVERSON OF BASES
DecimaI to Base R number
Base R to DecimaI Conversion
V(A) = % a
k
R
k
A = a
n-1
a
n-2
a
n-3
. a
0
. a
-1
. a
-m
(736.4)
8
= 7 x 8
2
+ 3 x 8
1
+ 6 x 8
0
+ 4 x 8
-1
= 7 x 64 + 3 x 8 + 6 x 1 + 4/8 = (478.5)
10
(110110)
2
= ... = (54)
10
(110.111)
2
= ... = (6.785)
10
(3)
16
= ... = (243)
10
(0.325)
6
= ... = (0.578703703 .................)
10
- Separate the number into its integer and fraction parts and convert
each part separateIy.
- Convert integer part into the base R number
successive divisions by R and accumuIation of the remainders.
- Convert fraction part into the base R number
successive muItipIications by R and accumuIation of integer
digits
EXAMPLE
Convert 41.6875
10
to base 2.
Integer = 41
41
20 1
10 0
5 0
2 1
1 0
0 1
raction = 0.6875
0.6875
x 2
1.3750
x 2
0.7500
x 2
1.5000
x 2
1.0000
(41)
10
= (101001)
2
(0.6875)
10
= (0.1011)
2
(41.6875)
10
= (101001.1011)
2
Convert (63)
10
to base 5: (223)
5
Convert (1863)
10
to base 8: (3507)
8
Convert (0.63671875)
10
to hexadecimaI: (0.A3)
16
Exercise
COMPLEMENT OF NUMBERS
Two types of compIements for base R number system:
- R's compIement and (R-1)'s compIement
The (R-1)'s Complement
Subtract each digit of a number from (R-1)
ExampIe
- 9's compIement of 835
10
is 164
10
- 1's compIement of 1010
2
is 0101
2
(bit by bit compIement operation)
The R's Complement
Add 1 to the Iow-order digit of its (R-1)'s compIement
ExampIe
- 10's compIement of 835
10
is 164
10
+ 1 = 165
10
- 2's compIement of 1010
2
is 0101
2
+ 1 = 0110
2
FXED PONT NUMBERS
Binary ixed-Point Representation
X = x
n
x
n-1
x
n-2
... x
1
x
0
. x
-1
x
-2
... x
-m
Sign Bit(x
n
): 0 for positive - 1 for negative
Remaining Bits(x
n-1
x
n-2
... x
1
x
0
. x
-1
x
-2
... x
-m
)
Numbers: ixed Point Numbers and Ioating Point Numbers
SGNED NUMBERS
Signed magnitude representation
Signed 1's compIement representation
Signed 2's compIement representation
ExampIe: Represent +9 and -9 in 7 bit-binary number
OnIy one way to represent +9 ==> 0 001001
Three different ways to represent -9:
In signed-magnitude: 1 001001
In signed-1's compIement: 1 110110
In signed-2's compIement: 1 110111
In generaI, in computers, fixed point numbers are represented
either integer part onIy or fractionaI part onIy.
Need to be abIe to represent both positive and negative numbers
- oIIowing 3 representations
CARACTERSTCS OF 3 DFFERENT REPRESENTATONS
CompIement
Signed magnitude: CompIement only the sign bit
Signed 1's compIement: CompIement all the bits incIuding sign bit
Signed 2's compIement: Take the 2's compIement of the number,
including its sign bit.
Maximum and Minimum RepresentabIe Numbers and Representation of Zero
X = x
n
x
n-1
... x
0
. x
-1
... x
-m
Signed Magnitude
Max: 2
n
- 2
-m
011 ... 11.11 ... 1
Min: -(2
n
- 2
-m
) 111 ... 11.11 ... 1
Zero: +0 000 ... 00.00 ... 0
-0 100 ... 00.00 ... 0
Signed 1's CompIement
Max: 2
n
- 2
-m
011 ... 11.11 ... 1
Min: -(2
n
- 2
-m
) 100 ... 00.00 ... 0
Zero: +0 000 ... 00.00 ... 0
-0 111 ... 11.11 ... 1
Signed 2's CompIement
Max: 2
n
- 2
-m
011 ... 11.11 ... 1
Min: -2
n
100 ... 00.00 ... 0
Zero: 0 000 ... 00.00 ... 0
2's COMPLEMENT REPRESENTATON EGTS
Signed 2's complement representation follows a "weight
scheme similar to that of unsigned numbers
Sign bit has negative weight
Other bits have regular weights
X = x
n
x
n-1
... x
0
V(X) = - x
n
L 2
n
+ x
i
L 2
i
i = 0
%
n-1
ARTMETC ADDTON: SGNED MAGNTUDE
1] Compare their signs
2] If two signs are the same ,
ADD the two magnitudes - Look out for an overflow
3] If not the same , compare the reIative magnitudes of the numbers and
then SUBTRACT the smaIIer from the Iarger --> need a subtractor to add
4] Determine the sign of the resuIt
6 0110
+) 9 1001
15 1111 -> 01111
9 1001
- ) 6 0110
3 0011 -> 00011
9 1001
-) 6 0110
- 3 0011 -> 10011
6 0110
+) 9 1001
-15 1111 -> 11111
6 + 9 -6 + 9
6 + (- 9) -6 + (-9)
OverfIow 9 + 9 or (-9) + (-9)
9 1001
+) 9 1001
(1)0010 overfIow
Fixed Point Representations
ARTMETC ADDTON: SGNED 2's COMPLEMENT
ExampIe
6 0 0110
9 0 1001
15 0 1111
-6 1 1010
9 0 1001
3 0 0011
6 0 0110
-9 1 0111
-3 1 1101
-9 1 0111
-9 1 0111
-18 (1)0 1110
Add the two numbers, incIuding their sign bit, and discard any carry out of
Ieftmost (sign) bit - Look out for an overflow
overfIow
9 0 1001
9 0 1001
+)
+)
+)
+) +)
18 1 0010
2 operands have the same sign
and the resuIt sign changes
x
n-1
y
n-1
s'
n-1
+ x'
n-1
y'
n-1
s
n-1
= c
n-1
W c
n
x'
n-1
y'
n-1
s
n-1
(c
n-1
W c
n
)
x
n-1
y
n
s'
n-1
(c
n-1
W c
n
)
Fixed Point Representations
ARTMETC ADDTON: SGNED 1's COMPLEMEN
Add the two numbers, incIuding their sign bits.
- If there is a carry out of the most significant (sign) bit, the resuIt is
incremented by 1 and the carry is discarded.
6 0 0110
-9 1 0110
-3 1 1100
-6 1 1001
9 0 1001
(1) 0(1)0010
1
3 0 0011
+)
+)
+)
end-around carry
-9 1 0110
-9 1 0110
(1)0 1100
1
0 1101
+)
+)
9 0 1001
9 0 1001
1 (1)0010
+)
overfIow
ExampIe
not overfIow (c
n-1
W c
n
) = 0
(c
n-1
W c
n
)
Fixed Point Representations
COMPARSON OF
REPRESENTATONS
* Easiness of negative conversion
S + M > 1's CompIement > 2's CompIement
* Hardware
- S+M: Needs an adder and a subtractor for Addition
- 1's and 2's CompIement: Need onIy an adder
* Speed of Arithmetic
2's CompIement > 1's CompIement(end-around C)
* Recognition of Zero
2's CompIement is fast
Fixed Point Representations
ARTMETC SUBTRACTON
Take the compIement of the subtrahend (incIuding the sign bit)
and add it to the minuend incIuding the sign bits.
( I A ) - ( - B ) = ( I A ) + B
( I A ) - B = ( I A ) + ( - B )
Fixed Point Representations
Arithmetic Subtraction in 2's compIement
FLOATNG PONT NUMBER REPRESENTATO
* The Iocation of the fractionaI point is not fixed to a certain Iocation
* The range of the representabIe numbers is wide
= EM
m
n
e
k
e
k-1
... e
0
m
n-1
m
n-2
. m
0
. m
-1
. m
-m
sign exponent mantissa
- Mantissa
Signed fixed point number, either an integer or a fractionaI number
- Exponent
Designates the position of the radix point
DecimaI VaIue
V() = V(M) * R
V(E)
M: Mantissa
E: Exponent
R: Radix
Floating Point Representation
FLOATNG PONT NUMBERS
0 .1234567 0 04
sign
sign
mantissa exponent
==> +.1234567 x 10
+04
ExampIe
A binary number +1001.11 in 16-bit fIoating point number representation
(6-bit exponent and 10-bit fractionaI mantissa)
0 0 00100 100111000
0 0 00101 010011100
ExampIe
Note:
In Ioating Point Number representation, onIy Mantissa(M) and
Exponent(E) are expIicitIy represented. The Radix(R) and the position
of the Radix Point are impIied.
Exponent Mantissa Sign
or
Floating Point Representation
ACTERSTCS OF FLOATNG PONT NUMBER REPRESENT
NormaI orm
- There are many different fIoating point number representations of
the same number
Need for a unified representation in a given computer
- the most significant position of the mantissa contains a non-zero digit
Representation of Zero
- Zero
Mantissa = 0
- ReaI Zero
Mantissa = 0
Exponent
= smaIIest representabIe number
which is represented as
00 ... 0
EasiIy identified by the hardware
Floating Point Representation
TERNAL REPRESENTATON AND EXTERNAL REPRESENTA
CPU
Memory
Internal
Representation
Human
Device
Another
Computer
External
Representation
External
Representation
External
Representation
EXTERNAL REPRESENTATON
DecimaI BCD Code
0 0000
1 0001
2 0010
3 0011
4 0100
5 0101
6 0110
7 0111
8 1000
9 1001
Numbers
Most of numbers stored in the computer are eventuaIIy changed
by some kinds of caIcuIations
Internal Representation for caIcuIation efficiency
inaI resuIts need to be converted to as External Representation
for presentabiIity
AIphabets, SymboIs, and some Numbers
EIements of these information do not change in the course of processing
No needs for InternaI Representation since they are not used
for caIcuIations
ExternaI Representation for processing and presentabiIity
ExampIe
DecimaI Number: 4-bit Binary Code
BCD(Binary Coded DecimaI)
External Representations
OTER DECMAL CODES
DecimaI BCD(8421) 2421 84-2-1 Excess-3
0 0000 0000 0000 0011
1 0001 0001 0111 0100
2 0010 0010 0110 0101
3 0011 0011 0101 0110
4 0100 0100 0100 0111
5 0101 1011 1011 1000
6 0110 1100 1010 1001
7 0111 1101 1001 1010
8 1000 1110 1000 1011
9 1001 1111 1111 1100
d
3
d
2
d
1
d
0
: symboI in the codes
BCD: d
3
x 8 + d
2
x 4 + d
1
x 2 + d
0
x 1
8421 code.
2421: d
3
x 2 + d
2
x 4 + d
1
x 2 + d
0
x 1
84-2-1: d
3
x 8 + d
2
x 4 + d
1
x (-2) + d
0
x (-1)
Excess-3: BCD + 3
Note: 8,4,2,-2,1,-1 in this tabIe is the weight
associated with each bit position.
BCD: It is difficuIt to obtain the 9's compIement.
However, it is easiIy obtained with the other codes Iisted above.
SeIf-compIementing codes
External Representations
GRA CODE
* Characterized by having their representations of the binary integers differ
in onIy one digit between consecutive integers
* UsefuI in some appIications
DecimaI
number
Gray Binary
g
3
g
2
g
1
g
0
b
3
b
2
b
1
b
0
0 0 0 0 0 0 0 0 0
1 0 0 0 1 0 0 0 1
2 0 0 1 1 0 0 1 0
3 0 0 1 0 0 0 1 1
4 0 1 1 0 0 1 0 0
5 0 1 1 1 0 1 0 1
6 0 1 0 1 0 1 1 0
7 0 1 0 0 0 1 1 1
8 1 1 0 0 1 0 0 0
9 1 1 0 1 1 0 0 1
10 1 1 1 1 1 0 1 0
11 1 1 1 0 1 0 1 1
12 1 0 1 0 1 1 0 0
13 1 0 1 1 1 1 0 1
14 1 0 0 1 1 1 1 0
15 1 0 0 0 1 1 1 1
4-bit Gray codes
Other Binary codes
GRA CODE - ANALSS
Letting g
n
g
n-1
... g
1
g
0
be the (n+1)-bit Gray code
for the binary number b
n
b
n-1
... b
1
b
0
g
i
= b
i
W b
i+1
, 0 A i A n-1
g
n
= b
n
and
b
n-i
= g
n
W g
n-1
W . . . W g
n-i
b
n
= g
n
0 0 0 0 00 0 000
1 0 1 0 01 0 001
1 1 0 11 0 011
1 0 0 10 0 010
1 10 0 110
1 11 0 111
1 01 0 101
1 00 0 100
1 100
1 101
1 111
1 010
1 011
1 001
1 101
1 000
The Gray code has a refIection property
- easy to construct a tabIe without caIcuIation,
- for any n: refIect case n-1 about a
mirror at its bottom and prefix 0 and 1
to top and bottom haIves, respectiveIy
RefIection of Gray codes
Note:
Other Binary codes
1
CARACTER
REPRESENTATON ASC
ASCII (American Standard Code for Information Interchange) Code
Other Binary codes
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E

NUL
SOH
STX
ETX
EOT
ENQ
ACK
BEL
BS
HT
L
VT

CR
SO
SI
SP
!
"
#
$
%
&
'
(
)
*
+
,
-
.
/
0
1
2
3
4
5
6
7
8
9
:
;
<
=
>
?
@
A
B
C
D
E

G
H
I
J
K
L
M
N
O
P
Q
R
S
T
U
V
W
X
Y
Z

]
m
n
'
a
b
c
d
e
f
g
h
I
j
k
I
m
n
o
P
q
r
s
t
u
v
w
x
y
z
{
|
}
~
DEL
0 1 2 3 4 5 6 7
DLE
DC1
DC2
DC3
DC4
NAK
SYN
ETB
CAN
EM
SUB
ESC
S
GS
RS
US
LSB
(4 bits)
MSB (3 bits)
CONTROL CARACTER
REPRESENTAON (ACS)
NUL NuII
SOH Start of Heading (CC)
STX Start of Text (CC)
ETX End of Text (CC)
EOT End of Transmission (CC)
ENQ Enquiry (CC)
ACK AcknowIedge (CC)
BEL BeII
BS Backspace (E)
HT HorizontaI Tab. (E)
L Line eed (E)
VT VerticaI Tab. (E)
orm eed (E)
CR Carriage Return (E)
SO Shift Out
SI Shift In
DLE Data Link Escape (CC)
(CC) Communication ControI
(E) ormat Effector
(IS) Information Separator
Other Binary codes
DC1 Device ControI 1
DC2 Device ControI 2
DC3 Device ControI 3
DC4 Device ControI 4
NAK Negative AcknowIedge (CC)
SYN Synchronous IdIe (CC)
ETB End of Transmission BIock (CC)
CAN CanceI
EM End of Medium
SUB Substitute
ESC Escape
S iIe Separator (IS)
GS Group Separator (IS)
RS Record Separator (IS)
US Unit Separator (IS)
DEL DeIete
ERROR DETECTNG CODES
Parity System
- SimpIest method for error detection
- One parity bit attached to the information
- Even Parity and Odd Parity
Even Parity
- One bit is attached to the information so that
the totaI number of 1 bits is an even number
1011001 0
1010010 1
Odd Parity
- One bit is attached to the information so that
the totaI number of 1 bits is an odd number
1011001 1
1010010 0
Error Detecting codes
Parity Bit Generation
or b
6
b
5
... b
0
(7-bit information); even parity bit b
even
b
even
= b
6
W b
5
W ... W b
0
or odd parity bit
b
odd
= b
even
W 1 = b
even
PART BT GENERATON
PART GENERATOR AND PART
CECKER
Parity Generator Circuit (even parity)
b
6
b
5
b
4
b
3
b
2
b
1
b
0
b
even
Parity Checker
b
6
b
5
b
4
b
3
b
2
b
1
b
0
b
even
Even Parity
error indicator
Error Detecting codes