DEPARTMENT OF TECHNICAL EDUCATION

ANDHRA PRADESH
Name : K.Suguna
Designation : Lecturer
Branch : Computer Engineering
Institute : GPT, Anantapur
Year/Semester : III - Semester
Subject : Computer Architecture
Subject Code : CM-303
Topic : I/O Organization
Duration : 100 mts
Sub Topic : Priority Interrupt, Polling, Daisy Chaining
Priority
Teaching Aids : ppt, Animations
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 Recap

In the last class, you have learnt about

• DMA mode of data transfer

• Applications of DMA mode of data transfer

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 Objective
On completion of this period ,you would be
able to understand

• Priority Interrupt
• Polling
• Daisy chaining priority

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 Priority Interrupts

• Generally I/O data transfer is initiated by CPU

• But device must be ready first

• Device readiness for data transfer can be

identify by the interrupt signal

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 Priority Interrupts

• How CPU responds to the interrupt request

-Push return address to the memory stack

-Branch to the interrupt service routing

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 Priority Interrupts
• Priority Interrupt system
-Deals with simultaneous interrupts and
determine which one to serve first (critical
situation / fast I/O)
-Determine in which conditions allow
interrupting while executing another interrupt
service routing

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 Priority Interrupts

• A priority interrupt is a system that established a

priority over the various sources.
• When two or more requests arrive simultaneously,
the priority determines which condition into be
serviced first.

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 Priority Interrupts

• The system may also determine which conditions

are permitted to interrupt the computer while
another interrupt is being serried.
• Devices with high speed transfers such as
magnetic disks are given high priority

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 Priority Interrupts
• When two devices interrupt the computer at the
same time.
• The computer services the device with the
higher priority first.
• Establishing the priority of simultaneous interrupt
can be done by software or hardware.

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 Polling (Software)

• Priority identification mechanism in software

• For all interrupts has a common branch

address

• Then polls the interrupt devices in sequence

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 Polling (Software)

• The order at which it polls determine the priority

-Higher priority device is tested first.

-If its interrupt signal is on serves the device

-Then test for the next device

-Proceed on until last device

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 Polling (Software)

• Disadvantage:
When there are multiple interrupts polling time might

exceed time available to service the I/O device

• Solution:
Hardware priority interrupts unit

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 Hardware Priority Interrupt Units
• Accepts interrupts from many sources

• Determine which one has higher priority

• Issue interrupt request accordingly to the

CPU

• Further each interrupt source has its own

interrupt vector to access its own service
routing directly

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 Hardware Priority Interrupt Units

• No polling required

• Two major establishments of hardware

priority function

-Serial Connection (Daisy-chain)

-Parallel Connection

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 Daisy Chain
VAD – vector Address
PI – priority in
PO – priority Out
processor data bus

VAD 1 VAD 2 VAD 3

PI Device1 P0 PI Device2 P0 PI Device3 P0
To Next
Device

INT
Interrupt request CPU
INTACK
Interrupt acknowledge

Fig .1

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 Daisy Chain
• Serial connection of all interrupt devices
• Higher priority one places first
• Interrupt request line is common (wired logic)
• CPU responds interrupt via Interrupt Acknowledge
line
• If Device 1 has pending interrupt disable PI and
place its own Interrupt vector. Otherwise pass it to
the next device via P0
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 Summary
We have discussed
• Priority Interrupt
• Polling
• Daisy chaining priority

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 Quiz
1. Priority interrupt uses
a. Last come first serve
b. First come first serve
c. None of the above

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1. Polling (software)
a. Priority identification mechanism using S/W
b. Priority identification mechanism using H/W
c. None of the above

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 Frequently asked questions

3. Explain about Priority interrupt

2. Explain about Polling
3. Explain Daisy chaining priority

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