By:Garima Singh

The telecommunication system has a heightened impact on the digital integrated circuit design industry. There are many methods available for the implementation of digital communication systems: Field Programmable Gate Array(FPGA) Application Specific Integrated Circuit

Cooperative communication protocols in which two or more sources transmit simultaneously in a single subchannel offer the potential for increased power efficiency and achievable rate with respect to orthogonal transmit cooperation.
These protocols are, however, complicated by the fact that they require strict transmitter synchronization in order for the carrier signals from each source to arrive in phase and constructively combine at the intended destination. Carrier Synchronization plays an important role in coherent communication systems, especially for those utilizing a high bandwidth efficiency modulation schemes such as Modem. The main method available for providing this synchronization is Phase Locked Loop(PLL). Traditionally a negative feedback loop is employed by the PLL in order to operate as a Carrier Synchronizer.

The basic components of a Digital Carrier Synchronizer are: Phase Detector Loop Filter Numerically Controlled Oscillator

The NCO is a digital signal generator which creates a synchronous(i.e. clocked), discrete time, discrete valued representation of a waveform usually sinusoidal. The NCO has several advantanges in terms of
Agility Accuracy Stability Reliability

NCOs are used in many communication systems such as

Digital

Up/Down convertors used in 3G wireless and software radio systems. Digital PLLs Multilevel FSK/PSK modulators/demodulators

1. LUT based NCO

2. CORDIC based NCO

3. Xilinx ROM based NCO

The design is generated by inputting the circuit into Xilinx ISE8.li which is done by using Verilog HDL. Simulations are important before configuring the chip. Certain User Constraints and Synthesis Results are stated below:

User Constraints:

Timing Constraint Package Pin Assignment Synthesis wise DCS using CORDIC based NCO occupies less area. Simulation proved that DCS configuration using Xilinx ROM based NCO provided a faster Locking Time and better Tracking Frequency Range.

Synthesis Result:

Synthesis Report of Different DCS

Simulation Report of Different DCS

In order to serve the purpose for rapid prototyping, emulation technique presents itself as a strong candidate. This emulation technique is not only involved in DCS but also can be customized for any data synchronization system. The functional sanctity of DCS core is validated. The same emulation environment can be used for analysing the performance of DCS configurations with different NCOs. A DCS architecture is built up which exploits faster locking and wider tracking range. The locking time of Xilinx ROM based NCO implementation is the best among the other techniques. Thus, a flexible DCS for FPGA based design solution which can accommodate various NCO configurations has been developed.

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