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Objectives
Describe the function and purpose of each program-visible & program-invisible register Detail the flag register and the purpose of each flag bit Describe how memory is accessed using real mode memory-addressing techniques Describe how memory is accessed using protected mode memory-addressing techniques Details the operation of the memory paging mechanism
Internal P Architecture
The programming model of the 8086 through the Pentium Pro is considered program visible because its registers are used during programming and are specified by the instructions Other registers are considered program invisible because they are not addressable directly during applications programming, but may be used indirectly during system programming
Internal P Architecture (contd) Fig. 2.1 depicts the programming model of the 8086 - Pentium Pro microprocessor The earlier 8086/8/286 contain 16-bit while 80386/486/Pentium/Pro contain full 32-bit internal architecture The multipurpose register include EAX, EBX, ECX, EDX, EBP, EDI, and ESI
EAX (accumulator) is used for instructions (e.g., multiplication, division, and some of adjustment instructions) and may hold the offset address of a location in the memory
Special Purpose Registers include EIP, ESP, EFLAGS and the segment registers CS, DS, ES, SS, FS, and GS
EIP (instruction pointer) points to the next instruction in a program and is used to find the next sequential instruction in a program located within the code segment ESP (stack pointer) addresses an area of memory called the stack
Segment Registers are additional registers which generate memory addresses when combined with other registers in the P
CS (code) is a section of memory that holds the code (programs and procedures) used by the P The code segment register defines the starting address of the section of memory holding code ES (extra) is an additional data segment used by some of the string instructions to hold destination data
Other default are shown in Table 2-2 (16-bit registers) and Table 2-3 (32-bit registers)
The 8086-286 allow four memory segments, and 80386 and above allow six memory segments (fig. 2.4) Fig. 2.5 shows how an application is stored