Академический Документы
Профессиональный Документы
Культура Документы
born in Budapest, Hungary on December 28, 1903 renowned mathematician and computer scientist who played an important role in computing technology wrote a report on the stored program concept, known as the First Draft of a Report on EDVAC died on February 8, 1957, after he was diagnosed with cancer, he was 54 years old
MEMORY
MAR MDR
INPUT
Keyboard Mouse Scanner Disk
CONTROL UNIT
PC IR
Memory
Basic Operations: LOAD read a value from a memory location STORE write a value to a memory location Interface to Memory:
Processing Unit
Functional Units ALU = Arithmetic and Logic Unit performs the arithmetic operations such as addition, subtraction, multiplication and division, and the logical operations Registers Small, temporary storage has eight registers (R0, , R7), each 16 bits wide Word Size number of bits normally processed by ALU in one instruction also width of registers 16 bits
Control Unit
organize execution of the program Instruction Register (IR) - contains the current instruction Program Counter (PC) - contains the address of the next instruction to be executed Control unit: reads an instruction from memory the instructions address is in the PC interprets the instruction, generating signals that tell the other components what to do an instruction may take many machine cycles to complete
Stored-Program concept Main memory stores both data and instructions Arithmetic and logic unit (ALU) capable of operating on binary data Control unit, which interprets and executes the instructions in memory Input and output (I/O) equipment operated by the control unit
SEAC
Standards Eastern Autom atic Computer first-generation electronic computer, built in 1950 by the U.S. National Bureau Of Standards
Manchester Mark 1
one of the earliest stored computer program, developed from the Small Scale Experimental machine (SSEM) or Baby(operational in June 1948) Manchester Automatic Digital Machine or MADM
SWAC
Standards Western Automatic Computer it was the fastest computer in the world until the IAS computer was completed
2) Program is stored in memory during execution 3) Program instructions are executed sequentially
The IAS operates by repetitively performing an instruction cycle. Each instruction cycle consists of two sub cycles. a) Fetch cycle: the opcode of the next instruction is loaded into the IR and the address portion is loaded into the MAR b) Execute cycle: the control circuitry interprets the opcode and executes the instruction by sending out the appropriate control signals to cause data to be moved or an operation to be performed by the ALU
MBR (Memory Buffer Register) -contains a word to be stored in memory or is sued to receive from memory MAR (Memory Address Register) -specifies the address in memory of the word to be written from or read into the MBR IR (Instruction Register) -contains the 8-bit op-code instruction being executed IBR (Instruction Buffer Register) -employed to hold temporarily the righthand instructions from a word in memory PC (Program Counter) -contains the address of the next instruction-pair to be fetched from memory AC and MQ (Accumulator and Multiplier Quotient) -employed to hold temporarily operands and results of ALU operations
AVIDAC
Argonne Version of the Institute's Digital Autom atic Computer built by Argonne National Laboratory used in reactor engineering and theoretical physics research
MISTIC
Michigan State Integral Computer Michigan State University's first computer consistof five sections input, memory, arithmetic processing, control, and output
Instruction Cycle
Instruction cycle = Fetch cycle + Execution cycle
The basic function performed by a computer is program execution. The program (to be executed) consists of a set of instructions stored in memory Instruction processing consists of two steps. a) Fetch Cycle: Processor reads (fetches) instruction from memory one at a time is called "fetch cycle" b) Execution Cycle: Execution of a fetched instruction is called "execution cycle" All instructions and data are contained in main memory
Start
Fetch Instruction
Execute Instruction
Fetch Cycle
Execute Cycle
Processor-memory data transfer between CPU and main memory Processor I/O Data transfer between CPU and I/O module Data processing Some arithmetic or logical operation on data Control Alteration of sequence of operations e.g. jump Combination of above
Interrupt Cycle
Interrupts
interrupt the normal processing of the processor Interrupts are provided for improving the processing efficiency Most external devices are much slower than the processor.
Classes of Interrupts
Program interrupts Interrupt generated by some condition that occurs as a result of an instruction execution. E.g., Arithmetic overflow, division by zero, etc.. Timer interrupts This allows the operating system to perform certain functions on a regular basis. E.g., Automatic saving of a document after certain time period. I/O interrupts Generated by an I/O controller to signal normal completion of an operation or to signal a variety of error conditions. Hardware failure interrupts Hardware failure interrupts will occur due to power failure, memory parityerror, etc.
Interrupt Cycle
Added to instruction cycle Processor checks for interrupt
Indicated by an interrupt signal
Multiple Interrupts
Disable interrupts
Processor will ignore further interrupts whilst processing one interrupt Interrupts remain pending and are checked after first interrupt has been processed Interrupts handled in sequence as they occur
Define priorities
Low priority interrupts can be interrupted by higher priority interrupts When higher priority interrupt has been processed, processor returns to previous interrupt
microcontroller
is "special purpose computers is "embedded" inside some other device, dedicated to one task and run one specific Program, low-power devices, dedicated input device and often (but not always) has a small LED or LCD display for output