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FEATURES of FETs

 Field Effect Transistors ( FET ) are three terminal devices and its current controlled mechanism is based on an electric field established by the voltage applied to the controlled terminal.  Just as there are npn and pnp BJTs, there are n-channel and p-channel FETs  The current is conducted by only one type of carrier ( electrons or holes ) depending on the type of FET ( n-channel or p-channel ), which gives the FET another name, the unipolar transistors.  The primary difference between BJTs and FETs is the fact that BJT is a current controlled device while FET is a voltage controlled device.
S. Kal, IIT-Kharagpur

FEATURES of FETs
 The most important characteristics of FET is its high input impedance (meg Ohms) compared to that of BJT (K Ohms).  FETs are more temperature stable than BJTs.  FETs are usually smaller in construction than BJTs, making them more useful in IC chips  Two types of FETs : (1) Junction Field Effect transistor ( JFET ) and (2) Metal Oxide Semiconductor Field Effect Transistors ( MOSFET )  Three terminals of FETs are known as Source, Drain and Gate
S. Kal, IIT-Kharagpur

JUNCTION FIELD EFFECT TRANSISTOR (JFET)


JFET is a three terminal device with one terminal capable of controlling the current between the other two. The major part of the structure is the n-type material that forms the channel between two p-type layers which are connected to form the Gate ( G ) terminal. The two ends of the channel are connected via Ohmic contact to form Drain (D) and Source (S). In the absence of any applied potential, the two p-n junctions form depletion region void of free carriers and unable to support conduction through the region.
S. Kal, IIT-Kharagpur

JUNCTION FIELD EFFECT TRANSISTOR (JFET)

A positive voltage VDS is applied across the channel and the gate has been connected directly to the source such that VGS = 0 V.
S. Kal, IIT-Kharagpur

JUNCTION FIELD EFFECT TRANSISTOR (JFET)


As the voltage VDS is increased from 0 to a few volts, the current will increase as determined by Ohms law ; as VDS approaches VP, depletion region widens causing reduction in channel width and channel resistance increases. The resistance approaches infinite Ohms in the horizontal region. The level of VDS at which two depletion region touches, is known as pinch-off voltage and is denoted by VP. ID maintains a saturation level defined as IDSS the maximum value of drain current for a JFET. Once VDS > VP, the JFET has the characteristics of a current source.
S. Kal, IIT-Kharagpur

N-Channel J-FET Characteristics


The level of VGS that results in ID = 0 mA is defined by VGS = VP, with VP being a negative voltage for n-channel devices and +ve voltage for p-channel JFETs. When VGS< 0, depletion regions will be established similar to those obtained at VGS = 0 but at a lower level of VDS. Pinch-off voltage continues to drop in a parabolic manner as VGS becomes more and more negative.
S. Kal, IIT-Kharagpur

TRANSFER CHARACTERISTICS OF A JFET


The transfer curve [plot of output (or drain) current versus input controlling quantity (gate-source voltage) ] has extended use in JFET amplifiers. The input and output relationship of a JFET is not linear. The relationship between ID and VGS is defined by Schockleys equation:

 The squared term of the equation will result in a nonlinear relationship between ID and VGS, producing a curve that grows exponentially with increasing values of VGS.
S. Kal, IIT-Kharagpur

TRANSFER CHARACTERISTICS OF A JFET  The transfer curve can be obtained using Shockleys equation or from the output characteristics as shown below.  When VGS = 0, ID = IDSS, and VGS = VP, ID = 0

S. Kal, IIT-Kharagpur

Metal-Oxide-Semiconductor FET (MOSFET)


Since late 1970s, MOSFET has been extremely popular.  Compared to BJT, MOS transistor can be made quiet small and their manufacturing process is relatively simple.  Analog, digital and combined analog-digital circuits (VLSI) are designed efficiently using MOS transistors.

S. Kal, IIT-Kharagpur

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Metal-Oxide-Semiconductor FET (MOSFET)


Two classes of MOSFETs are available Enhancement type and Depletion type  Heavily doped n-type regions, indicated as n+ source and n+ drain are created in the p-substrate. A thin (0.02 1 Qm ) layer of SiO2, which is an insulator covers the area between source and drain. Metal is deposited on top of the oxide layer to form gate electrode. Metal contact is also made to source, drain and substrate, which is known as body. The gate electrode is electrically insulated from the device body which causes the current in the gate terminal to be extremely small ( ~ 10-15 A )  Current voltage relation in the saturation region of NMOS is given by ID = Q0 Cox (W/L) (VGS VT)2
S. Kal, IIT-Kharagpur

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Enhancement MOSFET

(a) (b) (a) Physical structure of the enhancement-type NMOS transistor (b) iD-vDS characteristics of NMOSFET for VGS > Vt
S. Kal, IIT-Kharagpur

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Enhancement MOSFET

(a)

(b)

(a) (b) Enhancement NMOS as VDS is increased. The induced channel acquires a tapered shape and its resistance increases. VGS is kept constant at a value > Vt ID VDS (Drain) characteristics of a typical NMOS transistor
S. Kal, IIT-Kharagpur

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N-Channel Depletion-Mode MOSFET

Circuit symbol and physical structure of typical depletion-type MOSFET


S. Kal, IIT-Kharagpur

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Depletion Mode NMOS Transistor

Drain (ID VDS) and Transfer (ID VGS) characteristics of a typical depletion-mode MOSFET
S. Kal, IIT-Kharagpur

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Complementary MOSFET

Cross-section schematic diagram of a CMOS transistor (a well also called a tub, is produced by an extra diffusion step).
S. Kal, IIT-Kharagpur

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Complementary MOS (CMOS)


 Complementary devices makes possible many powerful circuit design possibilities and is the most useful of all the IC MOS technologies  It is a combination of PMOS and NMOS transistor  NMOS is implemented directly in the p-type substrate, PMOS is fabricated in a specially created n region, called n well  The two devices are isolated from each by a thick region of oxide that function as an insulator. This oxide is known as field oxide
S. Kal, IIT-Kharagpur

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