GaN HEMT on Si for High Power Applications

Speaker : Chia Hua Chang

Post-doctoral Research Fellow

Advisor : Prof. Edward Yi Chang Department of Materials

Engineering National Chiao Tung University, Taiwan

Science and

NCTU 11 CSDLab

Outline
n

Introduction
Material Properties of GaN Application Advantages Issues of GaN grown on Si substrate MOCVD growth of GaN on Si

Material Growth of GaN

n n n

GaN Device Fabrication GaN Devices Characteristics & Performance Summary

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Introduction

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Why GaN ?
Material Properties
Large direct band gap

Device Implications
High breakdown voltage, high temperature operation, UV optoelectronic devices High sheet charge concentration without intentional doping, device applications Microwave devices easily fabricated

Large Spontaneous and piezoelectric polarization

High electron mobility

High melting point, physically Easier to process and handle hard material

NCTU 44 CSDLab

Material Property of GaN

Material Band Gap Energy (eV) Breakdown field Thermal Conductivity (MV/cm) (W/cm*K) Mobility (cm2/V*s)
Saturated Velocity (*107 cm/s)

Si GaAs SiC GaN

1.1 1.4 3.2 3.4

1.5 0.5 4.9 1.5

1.5 0.5 4.9 1.5

1300 6000 600 1500

1.0 1.3 2.0 2.7

Key features of GaN High breakdown voltage nWide Band gap nHigh current density - High electron velocity - High sheet carrier density
n

High power application

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Comparison of Different Compound Semiconductor Device Performances

--Source: Caltech website

--Source: Compound semiconductor website

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Main Applications of GaN Devices

Light Emitting Diodes
Shimei Sanken

RF electronics

Laser Diodes

Power electronics

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GaN Devices in Power Electronics

Data from Yole Development (2007)

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Applications for Power Devices

Most devices consist of Si material.
DC Transmission

Transduction Capacity (rated current x rated voltage)

Thyristor
1MW
Train

SiC

GaN FETs are also applied to RF power amplifiers.

100kW

IGBT
Vehicle

10kW

GaN
Solar Inverter IH Cooking Power Source for PC 1 bit Audio Amp.

Si
1kW

MOSFET
0.1MHz 1MHz 10MHz

100MHz

1GHz

10GHz

Frequency

NCTU 99 CSDLab

GaN HEMT vs. Si Power Device

2014: IGBT with 3-D trench and field stop approach GaN HEMT has larger breakdown voltage and smaller on-resistance * GaN-based device has better power handling capability NCTU 1010 CSDLab

Application Advantages

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Potential Applications of GaN-based Power Devices

Power Supply/ Convertor

Automotive

Manufacturin g apparatus

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Home Appliances

Electric Vehicle Configuration modules to DC/DC boost converter and DC/AC inverter are key
drive the AC high power motor from battery energy. DC/DC buck converter is needed for the accessories.

Inverters consist of power modules that in turn contain many

power devices. Therefore, power devices are key components for electric (IEDM Data from Toyota Central R&D Labs. 2010) vehicle.

NCTU 1313 CSDLab

Power Device Requirements for EVs

Breakdown voltage: It is needed to over 1000 V, taking the surge capability into considerations. On-resistance: It is as low as possible to reduce the power loss, to minimize the size and to reduce the cost. Normally-off: E-mode is required for the simple inverter control board and the fail-safe viewpoint.

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U.K. Mishra et al, IEDM (2010)

Market forecast of GaN power devices

Significant boost in market demand

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GaN High Electron Mobility Transistor (HEMT)

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AlGaN/GaN HEMT
S G AlGaN GaN Substrate D
2DEG

Ec= 68% Eg

*No doping is required

Unlike other HEMT structures, 2DEG charges in GaN HEMT is induced by: Polarization field & surface traps

NCTU 1717 CSDLab

Polarization effect in AlGaN/GaN HEMT

2 types of polarization: spontaneous & piezoelectric

Origins of spontaneous polarization: i) Lack of inversion symmetry of the wurtzite structure ii) High electronegativity of nitrogen atom A For AlxGa1-xN pseudomorphically grown on GaN: N AlGaN l Ps Pp Spontaneous: (tensile) A Psp p z Cm-2 (x) = -0.090x 0.034(1-x) + 0.019(1-x) N l Piezoelectric: Ga N Ppz (x) = -0.0525x 0.0282x(1-x) Cm-2 GaN Psp Ga (relaxed) N
Net fixed polar charge at the AlGaN/GaN interface: = Ppz + Psp - Psp
AlGaN GaN

NCTU 1818 CSDLab

2DEG: Polarization field + Surface Source of states

carriers

Surface states form after the material growth

Net polarization charge

AlxG1-x N

Epz

Net polar charges induce electric field Epz in AlGaN Electrons at the surface are driven into the channel by the strong Epz

Without material doping in AlGaN or GaN, formation of 2DEG as a result of polarization field and surface traps
- source: UCSB

NCTU 1919 CSDLab

2DEG: Band diagram

Background doping: 1x1015 cm-3

2DE G

No Polarization field No Surface trap No ns

Polarization field (3.06MVcm-1) Surface trap =1.36x1013cm-2 ns= 1.34x1013 cm-2

- source: UCSB

NCTU 2020 CSDLab

2DEG: AlGaN critical thickness

tcrit Surface trap level, Et

ns = surface states

Surface potentia l, s

AlGaN thickness, t: 2. t , Epz increases the surface potential s

1. t < tcrit : surface traps filled with electron (neutral)

Minimum thickness

3. t > tcrit ( > Et) electrons transfer to channel s 2DEG 4. tcrit depends on the Et and Epz.
- source: UCSB

NCTU 2121 CSDLab

The effect of Al concentration

Al=35%, Ns=1.9x1013

E t

Film cracking

1.

When Al% increase polarization field increase, ns increase. Al% increase, mobility decrease due to i) alloy scattering, ii) interface roughness Al>35%, large stress in AlGaN, film crack, mobility drops abruptly.
Source: National Research Council Canada

2.

3.

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Growth of GaN Materials on Si Substrate

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Advantages of Growing III-nitrides on Si Substrate

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Epitaxial relation between GaN and Si

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Problems associated with GaN on Si (111)

l

Lattice mismatch l lattice mismatch between GaN and Si is 17% l High dislocation density in GaN layer(1010cm-2) Meltback etching l At high temperature Ga and Si form an alloy leads to deterioration of the substrate and the epilayer
Meltback etching
GaN layer shows a rough surface Deep hollows in Si substrate

NCTU 2626 CSDLab

Problems associated with GaN on Si (111)

Major problem is thermal expansion

mismatch
Thermal mismatch between GaN and Si is 54% High tensile stress cause cracks in GaN when

cooling from high growth temperature Cracks and GaN thickness is trade off.

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Thomas Swam MOCVD System

2 ~ 6 inch Si substrates

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Epitaxy Process
GaN reactor cleaning and conditioning
Using long bake-out at 1050oC for 30 minutes in hydrogen between each GaN deposition run to remove the Ga from the susceptor and chamber and gas lines

Pre-treatments of Si substrate

The Si(111) substrates were chemically cleaned by H2SO4: H2O2: H2O (3:1:1) and BOE HF(20:1) before being loaded into the reactor

In situ cleaning in reactor

The Si(111) substrates were in situ cleaned at 1050oC for 30 minutes under a hydrogen atmosphere NCTU 2929 CSDLab

In situ cleaning
NH3

1050

1035

1035

H2

860
300 torr

550

800

Temperatu re Pressur e TMAl 50 torr TMGa

100 torr Layer

HT/LT/HT AlN

Graded AlGaN /GaN

Layer growth sequence and growth condition

NCTU 3030 CSDLab

The solution for growth of GaN on Si (111) Substrate

Multilayer AlN (HT-AlN/LT-AlN/HT-AlN) were used. The growth of multilayer AlN on Si Substrate as the buffer 1st: HT-AlN is used to prevent the reaction of Si with the Ga and Nitrogen 2nd: LT-AlN is used as a nucleation layer for growth of the top AlN, and stop the extension of cracks and defects from the 1st AlN 3rd:HT-AlN is to form a high quality AlN with lower defect density for further growth of GaN layer 4th:Graded AlGaN is used to compensate the strain between the GaN and AlN films NCTU 3131 CSDLab

Optical image of AlN films on Si substrate

Single AlN layer thickness =30nm crack

Sample 1

Si[110] Crack direction

50m

50m

Multilayer AlN thickness =100nm crack free

Sample 2

NCTU 3232 CSDLab

AlN crystal quality versus AlN film thickness

The FWHM of the XRD rocking curve decreases when the AlN thickness increases. This means that to reach a high quality AlN film, enough AlN thickness is necessary.

APPLIED PHYSICS LETTERS 91, 222111 2007

NCTU 3333 CSDLab

Dependence of GaN crystal quality on AlN crystal quality

AlN film quality has significant influence on the quality of the GaN film grown

Also confirms that in order to grow high quality GaN films, high quality AlN buffers are necessary.

APPLIED PHYSICS LETTERS 91, 222111 2007

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Effect of Buffer layer structure on GaN film grown on 6 Si(111) substrate

Sample Buffer Type Buffer-layer thickness (nm) GaN thickness (m) FWHMGaN(004) FWHMAlN(004) Wafer size(in) Cracks Radius of curvature(m) Bow (m)
AlN

1
Single HT-AlN

2
*MultilayerAlN

3
*MultilayerAlN

4
*MultilayerAlN

5
*MultilayerAlN

6
*MultilayerAlN/ AlGaN

30 0 N/A 2.75 6 yes 80.45 -23.32

100 0 N/A 1.02 6 no 32.17 -54.36

60 0.5 0.54 1.66 6 yes 25.24 -71.3

120 0.5 0.315 0.865 6 yes 48.65 -52.3

150 2 0.120 0.52 6 yes 72.91 -45.65

200 0.8 0.223 0.343 6 no 238.96 -8.63

*Multilayer-AlN:HT-AlN/LT-AlN/HT-

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Layer thickness, composition and induced strain for sample A~D with different buffers * multilayer AlN(High Temperature/Low Temperature/ High Temperature AlN)
Sample GaN Thickness (m) *AlN Graded Thickness AlxGa1-xN (nm) Thickness (nm) Fixed AlxGa1-xN x fraction Fixed AlxGa1-xN Thickness (nm) AlN strain (a) AlN XRD (004) FWHM (deg) GaN strain (a) GaN XRD (004) FWHM (deg)

A B C D

0.8 0.8 0.8 0.8

200 200 200 200

0 500 500 500

0 0.25 0.50 0.42

0 200 200 200

0.378 0.335 0.312 0.300

0.717 0.319 0.357 0.293

0.146 0.137 0.132 0.120

0.322 0.228 0.242 0.158

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XRD data of sample with different buffer layers

XRD -2 scan of GaN films grown on various types of multilayer AlN/graded AlxGa1-xN/fixed AlxGa1-xN composition buffers NCTU 3737 CSDLab

 With the combination of multilayer AlN and AlGaN buffers, high quality

Crack-free GaN sample on 6 Si (111) substrate

crack-free GaN is grown on 6 Si substrate

NCTUs GaN on Si

Ref: APPLIED PHYSICS LETTERS 91, 222111 2007

NCTU CSDLab

3838

In-plane Stress Measurement by Raman

Raman shifts of the E2 (TO) phonon peaks A:566.8 cm-1 B: 566.6 cm-1 C: 566.9 cm-1 D:567.2 cm-1

* = Kxx cm-1 GPa-1 ,K= 4.3

Free-standing GaN E2 (TO)= 567.5 cm-1

The values of the tensile stress in the GaN films sample A = 0.162 GPa sample B = 0.209 GPa sample C = 0.139 GPa sample D = 0.069 GPa
*Guha, F.Shahedipour, R. C.Keller, V. Yang and B. W. Wessels, Appl. Phys. Lett. 78,58(2001)

NCTU 3939 CSDLab

Reciprocal space mapping for GaN with AlN/AlGaN buffer on Si (111) substrate
afilmGaN=3.1928 , afilmAlN=3.1203 abulkGaN=3.189 ,abulkAlN=3.111

a = [(afilm- abulk)/ abulk ] *100%

GaN :a,GaN= 0.12%, AlN :a,AlN = 0.3%
APPLIED PHYSICS LETTERS 91, 222111 2007

NCTU 4040 CSDLab

Growth of high quality GaN film on Si substrate by using AlN and Graded AlGaN Buffer Layers

GaN
Al0.07Ga0.9 3N Al0.29Ga0.7 HT/LT/HT AlN 1N

Si Substrate

The dislocations density in GaN film is much lower than those in AlGaN and AlN films. Double AlGaN buffer layers can reduce threading dislocation propagation.

Weak Beam @ g=[0002] Screw and mixed dislocations

Weak Beam @ g=[10-10] Edge and mixed dislocations

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0.4 m GaN on Si

1.2 m GaN on Si

Dislocation density is reduced from 5.88109 to 2.04108 cm-2 by increasing GaN thickness from 0.4 m to 1.2 m. Low dislocation density GaN film can be obtained using double AlGaN buffer layers.

Si Si

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GaN HEMT Device Fabrication

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Process Flow
Source Drain
AlGaN GaN Substrate Substrate

Source

Drain
AlGaN GaN Substrate

AlGaN GaN

Ohmic

Mesa

Gate

v
Substrate

AlGaN GaN

v
Substrate

AlGaN GaN

v
Substrate

AlGaN GaN

Passivati on

Nitride Via

AirBridge NCTU 4444 CSDLab

Ti/Al/Mo/Au Ohmic Contact Technology

Sourc e Gat e
Ni/A Drai u

AlGa N AlGa Ga N N Ga N

A u M o A l T i

Rc (mm)

Ti/Al/Mo/Au

88 8 Anneal Temp. C

Multi-layer structure (Ti/Al/Mo/Au) Smooth surface morphology up to 850 C Low Rc of 0.4 mm achieved (by 1/5) NCTU 4545 CSDLab

Gate Lithography

Formation of mushroom gate using a tri-layer resist process:

Resist profile after developing
substrat e PMMA top layer, less sensitive P(MAA-MMA) middle layer, sensitive PMMA bottom layer, less Metal profile after sensitive

evaporation
substrat e

Re-entrant resist profile creates metal discontinuity for liftoff

Top view- resist dose

Heavy line dose in middle Light area dose on the sides --source: Cornell university

Metal profile after liftoff

substrat e Bottom resist layers define stem and head of mushroom gate

NCTU 4646 CSDLab

Mushroom Gate

Gate resistance is an important parasitic resistance source Rg = Zg/A, where Z g is the gate width and A the crosssectional area of the gate Increasing cross section area of the gate is essential in reducing gate resistance for sub micron gates

SEM image of a mushroom gate with <0.2 m footprint

Source: Cornell university NCTU 4747 CSDLab

Images of Au Air-Bridge (for high current)

Large device can be connected Department Au air bridge by electro-plated of Materials Science and Engineering

NCTU CSDLab Compound Semiconductor Device Laboratory CSD Lab.

GaN HEMT Devices Characteristics

NCTU 4949 CSDLab

DC Device Level Issues

Imax

Vma x

Maximize I Maximize nS, Maximize nS Maximize PSP, PP Maximize Al mole fraction without strain relaxation Maximize Minimize effective gate length Minimize Lg and gate length extension Maximize Minimize dislocations Smooth interface

- source: UCSB

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Dispersion At High Frequency Operation L

AlGaN

- - - -- - - -

g G

Electrons in Surface - States

- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Dislocation - - - Point Defect -

Electrons in buffer traps

Electrons in surface states and/or buffer traps deplete the channel causing gate length extension

D C

Id (5 mA)

Dispersio n A C Load line

Severe consequence:
Dispersion between small signal and large signal behaviors because of the large trap time constant
Vds (V)

- source: UCSB

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Non-Ideal Power Operation

Current collapse due to surface traps OFF-state S D G
Drain Current

Depletion layer S
ON-state

0 Current collapse

Drain Voltage

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Current Slump in HEMTs

Expected power is less than predicted power due to RF dispersion

Pulsing gate with 200 ns pulse have been plotted to get the i-v curves under conditions similar to RF

--source: Cornell university

NCTU 5353 CSDLab

Passivation: Remedy for Current Slump

A Si3N4 passivation layer improved power performance After passivation usually perform at 60 70 % of the expected power level

--source: Green, et al, IEEE Electron Device Lett., June 2000, p. 268

NCTU 5454 CSDLab

Effect of External Stress on Surface State

3-point Test Fixture: measurement under point bending
L Cylindrical bar h Force J0
DC without strain Pulse without strain Pulse under strain

ID (mA/mm)

h : Thickness of sample J0 : Deformation in the center L : Length of sample In this work, yy = 1.4710-4 = 2.8210-4 = 3.9410-4

VD (V)

(Phys. Status Solid B, 211, 309 , 1999)

NCTU 5555 CSDLab

Pulsed I-V under Tensile Strain by SiNx

First SiNx layer First SiNx layer :: 100nm 100nm Second SiNx layer : 550nm (Stress)
Bias Point : Vd = 0 V , Vg = 6V

AlGaN AlGaN GaN GaN Substrate Substrate

Tensile strain would degrade the transient drain current due to the additional surface states

NCTU 5656 CSDLab

2DEG Electrons and Surface States

+++++++++++++ ++++++ AlGaN sp pz ------------------------GaN Substrate

Stress
Figure. Schematic conduction band diagram for an AlGaN/GaN HFET showing the various space charge components.

Polarization Charges

(Appl. Phys. Lett., vol. 77, no. 2, 2000)

Additional states ++ + ++ + + + + + + + + + + + + + + + + + + + ++ + + + + sp pz SIP AlGaN - - - - - - - - -- - -- --- --- -- - -- - - - - - --- -GaN Substrate (SIP: Stress-Induced polarization)

Donor-like surface states are a likely source of 2DEG electrons in AlGaN/GaN HFETs.

NCTU CSDLab

Field-Plate Technology
Gat e Sourc e Ti/A l
2.

Field Plate

SiN Film Drai n

Function of fieldplate:
1.

AlGa N Ga

Reduction in drain current dispersion phenomena Enhancement of breakdown voltage

N S.I. SiC Sub.

Relaxed Electric Field by Field Plate - Suppress Current Collapse - Enhance Breakdown NCTU 5858 CSDLab Voltage

Functions of Field-Plate gate

Reduction of drain current dispersion

With field plate (Vg=2V)

+Vg
Without field plate (Vg=2V)

Gate -+++ ---

Device cross-section with field plate gate

Pulsed IV characteristics measured with 200 ns pulse-width

--source: IEDM Conf., 1998,pp. 5962 IEE E.L.,2004, Vol.40, No.1 IEEE TED.,2001, Vol.48, pp. 560566

NCTU 5959 CSDLab

Functions of Field-Plate gate

Enhancement of breakdown voltage

FP Gate

without FP with FP

Device cross-section with field plate gate

Simulated distribution of the electric field along the 2-DEG.

--source: IEEE TED.,2001, Vol.48, NO.8

NCTU 6060 CSDLab

Multi-Step FP vs Slanted FP-1

G G One-step FP

SiO2 S 0V 0V 60V 30V 90V Al0.2Ga0.8N GaN 100V D S 0V 30V 0V 60V 90V 100V D

Multi-Step FP

Slanted FP

0V

100V

D S

0V

100V

0V

30V

60V

90V

0V

30V

60V

90V

--source: Fukui University, Japan

NCTU 6161 CSDLab

Multi-Step FP vs Slanted FP-2

4 Electric Field (MV/cm) 3 2 1 0 -1 Without FP One-step FP Multi-step FP Slanted FP Vds=100V Vgs=-5V

Distance from Source (m)

--source: Fukui University, Japan

NCTU 6262 CSDLab

Breakdown Voltage Enhancement by Slanted Gate

Off-state BV: 200V 1900V

--source: UCSB

NCTU 6363 CSDLab

GaN HEMT for Switching Applications

NCTU 6464 CSDLab

GaN HEMTs for Switching Application Converter (DCDC)

- Buck converter (high V low V) - Boost converter (low V high V)

Fig.1 Buck Converter

Inverter (DCAC)
Fig.2 Boost Converter

NCTU 6565 CSDLab

Ideal Switching Device

Requirement for switching device Low on-resistance Current High breakdown voltage Voltage

Power Loss = I X V 0 Efficiency < 100%

GaN HEMT

Low on-resistance Fast switching High breakdown voltage High Temperature stability NCTU 6666 CSDLab

Hybrid Boost Converter Circuit

FP MIS-HEMT Switch SiC-SBD connected Vout=Vin/(1-D)

Vin=175V, Vout=350V NCTU 6767 CSDLab

--source: Toshiba Corp., Japan

Switching Characteristics

ID,max= 367 mA/mm (Vgs=2V) Ron,spec = 3.6mcm2 44x lower than the Si-limit The Breakdown voltage = 940V Power efficiency = 94.2% ( 1MHz)
--source: Toshiba Corp., Japan

NCTU 6868 CSDLab

Integration Boost Converter Circuit

Basic Configuration

-- Source: Hong Kong University of Science and Technology

NCTU 6969 CSDLab

Switching Characteristics Power Efficiency

69% of total loss

Vin=10V, Vout=21V , D=55% Power efficiency = 84%

-- Source: Hong Kong University of Science and Technology

NCTU 7070 CSDLab

Enhancement-mode HEMT (E-mode HEMT)

NCTU 7171 CSDLab

Criterion of Operation Modes

Key factor of definition: Threshold voltage (Vth)

Vth = gate bias (VG) intercept of extrapolation of

E-modecurrent (ID) drain operation: Vth > 0

NCTU 7272 CSDLab

Advantages of E-mode device

Properties of operating condition:
Single-polarity power supply VDS VGS
E-mode D-mode

Advantages:
Simplified circuit reducing size & cost Reducing power consumption Providing fail-safe

NCTU 7373 CSDLab

How to realize E-mode operation

AlGaN S

Recessed Gate G GaN i-GaN

P-GaN cap D S
AlGaN

G GaN i-GaN Substrate

AlGaN

F-plasma treatment G

F-

GaN

i-GaN Substrate

Substrate

NCTU 7474 CSDLab

Si3N4 layer

Characteristics of F-treated Emode device

CF4 plasma treatment

G 13 nm AlGaN 1 nm AlN 2 m i-GaN Sapphire

Schematic cross-section and transconductance characteristics F-treated E-mode AlGaN/GaN HEMTs

D-mode

E-mode E-mode + PTA

IDSS (mA/mm) Vth (V) GM (mS/mm)

450 -2.3 150

20 N/A 5

210 1.4

NCTU CSDLab

100 7575

Si3N4

F-treated E-mode MISHEMTs

S G
Al2O 3

Al2O3 (nm) IDSS (mA/mm)

16

13 nm AlGaN 1 nm AlN 2 m i-GaN Sapphire

520 100 5.2

GM (mS/mm) Vth (V)

NCTU 7676 CSDLab

Improvement of forward turn-on voltage by MIS-HEMT

gate leakage current and gm curves of F-treated E-mode AlGaN/GaN HEMTs

High-k gate insulator improved gate leakage current towards high-turn-on voltage High Von characteristics could improve output current density without limiting by gate leakage phenomenon

NCTU 7777 CSDLab

New Device Structures

NCTU 7878 CSDLab

E-mode GaN MIS-HEMTs with Triple Cap Layer

Triple cap layer increases Ns of 2DEG by 80% High current density High-k gate insulator modulates Vth up to 3V -- Source: Fujistu Laboratory, Japan

NCTU 7979 CSDLab

E-mode GaN HEMTs with p-type Injection Gate

Replace conventional Schottky gate with p-GaN hole injection gate Vth shifts to +0.45V Low on-resistance (3.4 mcm2) due to 2DEG
-- Source: Meijo University, Japan

NCTU 8080 CSDLab

99.3% Efficiency 3-Phase Inverter Using Injection Gated GaN HEMTs

Hole Injection gated GaN HEMTs
Output waveform @900W operation

Efficiency of GaN-based Inverter well exceeds Si-based IGBT inverter

-- Source: Panasonic Corp., Japan

NCTU 8181 CSDLab

MOSFET: Alternative for E-mode Operation

0.06 0.05 0.04 0.03 0.02

+ Vth

0.01 0.00

Source: Marlodt, et al., J. Appl. Phys., vol.48 , 2009, Kambayashi, et al., IEEE Elec. Dev. Lett., vol. 28, No. 12, 2007

NCTU 8282 CSDLab

Vertical Device
G S HTS AlGaN n--GaN SiO2 p-GaN p-GaN n-GaN substrate D
Source: Toyota Central R&D Labs. (JJAP, Vol. 46, No. 21, 2007)

Constant voltage contour lines

Source: UCSB. (JAP, Vol. 95, No. 4, 2004)

UCSB(2004), Toyota Motor(2007), ROHM Co.(2008) and Sumitomo Electric Industries(2010) have reported the vertical devices. Advantages: ease of packaging with heat release, reduction of wafer area, free of the surface traps (current collapse). The current collapse becomes remarkable under high voltage operation

NCTU 8383 CSDLab

Published Data of Vertical Devices BV On-resistance Vth Reference

UCSB Toyota Motor RHOM Co. Sumitomo 200 V 2.5 m-cm2 2.6 m-cm2 9.3 m-cm2 -16 V
Device Research Conference (2010) Jpn. J. Appl. Phys. 46 (2007) App. Phys. Express 1 (2008)

Challenges: 672 V 7.6 m-cm2 +0.3 V App. Phys. Express 3 (2010) Electric Cost of GaN substrate Epitaxial quality (threading dislocation) Vertical devices have a great potential for power switching

applications; however, the development of the vertical devices is quite primitive, making it impossible to evaluate the vertical device performance precisely.

NCTU 8484 CSDLab

Summary

GaN electronic devices on Si substrate are promising choices for future high power switching applications. AlGaN/GaN heterojunction possesses high electron concentration due to its strong polarization effect and high breakdown due to the large bandgap. Multiple AlN and AlGaN buffer layer structure is useful to reduce the stress and to improve the crystal quality of GaN grown on Si substrate. Field plate technique helps to reduce current slump and to increase the breakdown voltage. High efficiency power electronic circuits using GaN HEMTs as switching devices have been demonstrated. Enhancement-mode HEMT is required for EV power device applications. New GaN device structures have been demonstrated for future E-mode power applications 8585

NCTU CSDLab