Академический Документы
Профессиональный Документы
Культура Документы
Ho Dac Phuong, Msc Computer Networking & Telecommunication Department College of Technology Vietnam National University, Hanoi
hdphuong@vnu.edu.vn
http://www.coltech.vnu.edu.vn/courses/cour se/view.php?id=69
CH1.1
Introduction
Operating System Course
Input/Output
5.1 Principles of I/O hardware 5.2 Principles of I/O software 5.3 I/O software layers 5.4 Disks 5.5 Clocks 5.6 Character-oriented terminals 5.7 Graphical user interfaces 5.8 Network terminals 5.9 Power management
CH1.2
Device Controllers
Operating System Course
I/O devices have components: mechanical component electronic component The electronic component is the device controller may be able to handle multiple devices Controller's tasks convert serial bit stream to block of bytes perform error correction as necessary make available to main memory
CH1.4
CH1.7
Interrupts Revisited
Operating System Course
How interrupts happens. Connections between devices and interrupt controller actually use interrupt lines on the bus rather than dedicated wires
CH1.8
Device independence programs can access any I/O device without specifying device in advance
(floppy, hard drive, or CD-ROM)
Uniform naming name of a file or device a string or an integer not depending on which machine Error handling handle as close to the hardware as possible
CH1.9
Synchronous vs. asynchronous transfers blocked transfers vs. interrupt-driven Buffering data coming off a device cannot be stored in final destination Sharable vs. dedicated devices disks are sharable tape drives would not be
CH1.10
CH1.12
Interrupt-Driven I/O
Operating System Course
Writing a string to the printer using interrupt-driven I/O Code executed when print system call is made Interrupt service procedure
CH1.13
Printing a string using DMA code executed when the print system call is made interrupt service procedure
CH1.14
CH1.15
have driver starting an I/O operation block until interrupt notifies of completion
Save regs not already saved by interrupt hardware Set up context for interrupt service procedure
CH1.16
5. 6. 7.
8. 9.
Set up stack for interrupt service procedure Ack interrupt controller, reenable interrupts Copy registers from where saved Run service procedure Set up MMU context for process to run next Load new process' registers Start running the new process
CH1.17
Device Drivers
Operating System Course
Logical position of device drivers is shown here Communications between drivers and device controllers goes over the bus
CH1.18
Error reporting
Allocating and releasing dedicate devices Providing a device-independent block size
(a) Without a standard driver interface (b) With a standard driver interface
CH1.20
(a) Unbuffered input (b) Buffering in user space (c) Buffering in the kernel followed by copying to user space (d) Double buffering in the kernel
CH1.21
Layers of the I/O system and the main functions of each layer
CH1.23
Disks
Disk Hardware (1)
Operating System Course
Disk parameters for the original IBM PC floppy disk and a Western Digital WD 18300 hard disk
CH1.24
Physical geometry of a disk with two zones A possible virtual geometry for this disk
CH1.25
Hamming code
Consider a Hamming code to detect and correct for single-bit errors assuming each codeword contains a seven-bit data field, e.g. an ASCII character. for example. Such a coding scheme requires four check bits since, with this scheme, the check bits occupy all bit positions that are powers of 2. Such a code is thus known as an (11, 7) block code with a rate of 7/11 and a redundancy of . For example, the bit positions of the value 1001101 are: Bit Position 11 10 9 8 7 6 5 4 3 2 1 Bit value 1 0 0 x110x1xx
CH1.27
Hamming distance
Let x and y be two binary sequences of the same length. The Hamming distance between these two codes is the number of symbols that disagree. Suppose the code x is transmitted over the channel. Due to errors, y is received. The decoder will assign to y the code x that minimises the Hamming distance between x and y. For example, consider the codewords: a = 10000 b = 01100 c = 10011 If the transmitter sends 10000 but there is a single bit error and the receiver gets 10001, it can be seen that the "nearest" codeword is in fact 10000 and so the correct codeword is found.
CH1.28
Hamming distance
It can be shown that to detect n bit errors, a coding scheme requires the use of codewords with a Hamming distance of at least n + 1. It can also be shown that to correct n bit errors requires a coding scheme with at least a Hamming distnace of 2n + 1 between the codewords. By designing a good code, we try to ensure that the Hamming distance between possible codewords x is larger than the Hamming distance arising from errors
CH1.29
Hamming distance
11 = 1011 7 = 0111 6 = 0110 3 = 0011 1001 The transmitted codeword is thus: Bit Position 11 10 9 8 7 6 5 4 3 2 1 Bit value 1 0 011100101
CH1.30
Hamming distance
Similarly, at the receiver, the four-bit binary numbers corresponding to those bit positions having a binary 1, including the check bits, are again added together and, if no errors have occurred, the modulo 2 sum should be zero: 11= 1101 8 = 1100 7 = 0111 6 = 0110 3 = 0011 1 = 0001 0000
CH1.31
Hamming distance
Now consider a single-bit error; say bit 11 is corrupted from 1 to 0. The new modulo 2 sum would now be: 8 = 1100 7 = 0111 6 = 0110 3 = 0011 1 = 0001 1011 Firstly, the sum is non-zero, which indicates an error, and secondly the modulo 2 sum, equivalent to decimal 11, indicates that bit 11 is the erroneous bit. The latter would therefore be inverted to obtain the corrected codeword and hence data bits.
CH1.32
CH1.35
Cross section of a CD-R disk and laser not to scale Silver CD-ROM has similar structure without dye layer with pitted aluminum layer instead of gold
CH1.36
CH1.37
A disk sector
CH1.38
Time required to read or write a disk block determined by 3 factors 1. Seek time 2. Rotational delay 3. Actual transfer time Seek time dominates
Error checking is done by controllers
CH1.41
CH1.42
CH1.43
Error Handling
Operating System Course
A disk track with a bad sector Substituting a spare for the bad sector Shifting all the sectors to bypass the bad one
CH1.44
Stable Storage
Operating System Course
CH1.45
Clocks
Clock Hardware
Operating System Course
A programmable clock
CH1.46
Soft Timers
Operating System Course
A second clock available for timer interrupts specified by applications no problems if interrupt frequency is low
Soft timers avoid interrupts kernel checks for soft timer expiration before it exits to user mode how well this works depends on rate of kernel entries
CH1.49
An RS-232 terminal communicates with computer 1 bit at a time Called a serial line bits go out in series, 1 bit at a time Windows uses COM1 and COM2 ports, first to serial lines Computer and terminal are completely independent
CH1.50
Output Software
Operating System Course
The ANSI escape sequences accepted by terminal driver on output ESC is ASCII character (0x1B) n,m, and s are optional numeric parameters
CH1.53
Parallel port
CH1.54
A video RAM image simple monochrome display character mode Corresponding screen
Input Software
Operating System Course
Keyboard driver delivers a number driver converts to characters uses a ASCII table
Exceptions, adaptations needed for other languages many OS provide for loadable keymaps or code pages
CH1.56
Network Terminals
X Windows (1)
Operating System Course
X Windows (2)
Operating System Course
CH1.64
Messages used in the SLIM protocol from the server to the terminals
CH1.66
CH1.67
CH1.68
Running at full clock speed Cutting voltage by two cuts clock speed by two, cuts power by four
CH1.69
Telling the programs to use less energy may mean poorer user experience
Examples change from color output to black and white speech recognition reduces vocabulary less resolution or detail in an image
CH1.70