Welcome to Systems Software

The purpose of this course is to provide background in fundamental types of system software, particularly assemblers, loaders, macro processors, and linkage editors. The course uses a simplified instructional computer (SIC and SIC/XE) to illustrate machine level system software requirements.

Welcome to Systems Software

A major objective of the course will be for students to design and implement a working (cross) assembler for SIC and part of SIC/XE.

Concerned

Application programs

Machine independent Solves a specific problem Machine dependent Support computers operation

Systems programs

Compiler Assembler Linker Loader OS

Application Programs

C/C++, Java, Perl, Python, Fortran, PL/1, LISP, Prolog, Pascal, C#, Ruby Programs to sort, search, etc.

Systems Programs

Compiler

Translates application programs to intermediate code

Assemblers

Translates intermediate code to machine code

Links the machine code modules into one

Linkers

Loaders

Loads the machine code in memory

Controls the operation of the computer

OS

Assembler Program - SIC (Intermediate Code)

LDA STA LDCH STCH . . ALPHA FIVE CHARZ C1 FIVE ALPHA CHARZ C1 Load 5 into A Store in ALPHA Load character Z into A Store in C1

RESW WORD BYTE RESB

1 5 CZ 1

one word variable one word constant one byte constant one byte variable

Assembler Program SIC/XE (Intermediate Code)

LDA STA LDCH STCH . . ALPHA C1 #5 ALPHA #90 C1 Load 5 into A Store in ALPHA Load character Z into A Store in C1

RESW RESB

1 1

one word variable one byte variable

SIC / SICXE

Simple Instruction Computer Simple Instruction Computer Extended Designed to be similar to real computers Designed to avoid unnecessary detail

CHARACTERISTICS OF
SIC

SIC Architecture - Memory

Bytes 8 bits Word 3 bytes (24 bits) Byte addressable Words addressed by lowest byte 32767 (215) bytes of total memory

SIC Architecture - Registers

5 registers Each a full word Each special purpose

Register Names and Usage - SIC

A 0 Accumulator; used for arithmetic X 1 Index register; used for addressing L 2 Linkage resister; used for return address PC 8 Program counter; address of next inst. SW 9 Status word; variety of information including a condition code (CC)

Data Formats - SIC

Integers 24 bit binary 2s complement Characters 8 bit ASCII No floating point

Data Formats Example

Integer
5 -5 000000000000000000000101 111111111111111111111011

Character A 01000001 R 01010010

Instruction Formats - SIC

24 bit
8 bit opcode 1 bit addressing mode 15 bit address

Addressing Modes - SIC

Direct x = 0 Target address = address Indexed x = 1 Target address + (X) (X) is the contents of register X

Instruction Set - SIC

Load and Store Registers

LDA, LDX, STA, STX, etc.

Integer Arithmetic (all involve register A)

Add, SUB, MUL, DIV

COMP compares A with a word in memory Sets the CC in the SW JLT, JEQ, JGT based on the CC as set by COMP JSUB jumps to subroutine, places return address in L RSUB returns, using the address in L

Compare

Jump instructions

Subroutine Linkage

Input/Output - SIC

TD test device is ready to send/receive data

CC of < means device is ready CC of = means device is not ready

RD read data, when the device is ready WD write data Transfers 1 byte at a time to or from the rightmost 8 bits of register A. Each device has a unique 8-bit code as an operand.

CHARACTERISTICS OF
SIC/XE

SIC/XE Architecture - Memory

Bytes 8 bits Word 3 bytes (24 bits) Byte addressable Words addressed by lowest byte 1 meg (220) bytes of total memory (more memory leads to a change in instruction formats and addressing modes

SIC/XE Architecture - Registers

5 registers of SIC + 4 additional Each a full word Each special purpose

Register Names and Usage SIC and SIC/XE

A 0 Accumulator; used for arithmetic X 1 Index register; used for addressing L 2 Linkage resister; used for return address PC 8 Program counter; address of next inst. SW 9 Status word; variety of information including a condition code (CC)

FOUR Additional Registers and their Usage SIC/XE

B 3 Base register, used for addressing S 4 General register no special use T 5 General register no special use F 6 Floating-point accumulator (48 bits)

Data Formats SIC/XE

Integers 24 bit binary 2s complement Characters 8 bit ASCII Floating point 48 bit floating point

Data Formats SIC/XE

24 bit integer

48 bit floating point

1 bit sign 11 bit exponent 36 bit fraction

Floating Point Format SIC/XE

Fraction is a value between 0 and 1 The binary point is immediately before the high order bit which must be 1 The exponent is an unsigned binary number between 0 and 2047

Floating Point (cont) SIC/XE

Suppose the exponent is e and the fraction is f The number is f * 2 (e+1024) 0 sign is positive 1 is negative 0 is all bits including sign are 0

Data Formats Example

Integer
5 = 000000000000000000000101 -5 = 111111111111111111111011

Character A 01000001

Data Formats Example

Float

4.89 = .1001110001111010111000010100011110 10111000010100 * 23 (1027) =0 10000000011 100111000111101011 100001010001111010

Data Formats Example

Float -.000489 = 100000000011000000

(1014)

111100000001111110 * 2-10 =1 01111110110 100000000011000000 111100000001111110

Instruction Formats SIC/XE

Format 1 - 8 bit (1 byte)

8 bit opcode

Format 2 16 bit (2 bytes)

8 bit opcode 4 bit R1 reg 4 bit R2 reg

Instruction Formats SIC/XE

Format 3 - 24 bit (3 byte)

n i x b p e 12 bit displacemnt

6 bit opcode

Format 4 32 bit (4 bytes)

6 bit opcode n i x b p e 20 bit address

Addressing Modes SIC/XE Format 3/4 Instruction

Base relative b=1,p=0

TA = (B)+disp

0 disp 4095 disp is a n unsigned integer PC relative b=0,p=1 TA = (PC)+disp -2048 disp 2047 disp is a 2s complement integer (?) is the contents of register ? if b=0, p=0 then disp is an absolute address

Addressing Modes SIC/XE Format 3/4 Instruction (cont)

Any addressing mode can be combined with indexed addressing. i.e. if bit x is a 1 then (X) is added in the target address calculation.

Addressing Modes SIC/XE Format 3/4 Instruction the disp (cont)

Immediate addressing i = 1, n = 0 the address itself is the operand, no memory reference Indirect addressing i = 0, n = 1 the word at the location is fetched as the address for the instruction Simple addressing i = n = 0 the target address is taken as the operand e = 0 implies format 3, e = 1 implies format 4

Instruction Set SIC/XE

Load and Store Registers

LDA, LDX, STA, STX, LDB, STB, RMO

Integer Arithmetic (all involve register A)

Add, SUB, MUL, DIV, ADDF, SUBF, MULF, DIVF, ADDR, SUBR, MULR, DIVR
COMP compares A with a word in memory Sets the CC in the SW JLT, JEQ, JGT based on the CC as set by COMP JSUB jumps to subroutine, places return address in L

Compare

Jump instructions

Subroutine Linkage

Input/Output SIC/XE

TD test device is ready to send/receive data

CC of < means device is ready CC of = means device is not ready

RD read data, when the device is ready WD write data Transfers 1 byte at a time to or from the rightmost 8 bits of register A. Each device has a unique 8-bit code as an operand. I/0 channels SIO, TIO, HIO

Summary Addressing Modes

e = 0 Format 3 instruction e = 1 Format 4 instruction

Summary Addressing Modes

Direct Addressing b = p = 0

Relative Addressing
b = 1, p = 0

TA = disp

TA = (B) + disp TA = (PC) + disp

b = 0, p = 1

Summary Addressing Modes

Immediate

i = 1, n = 0

Target address itself is used as the operand value

Indirect

i = 0, n = 1

Value contained in the word is the address

Summary Addressing Modes

Simple

i=n=0 TA is the location of the operand i=n=1 TA is determined by other bits

SIC/XE instruction