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5/28/12
Mahdi Hassanpour
Contents:
Introduction Block Diagram and Pin Description of the 8051 Registers Memory mapping in 8051 Stack in the 8051 I/O Port Programming Timer Interrupt
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The microprocessor is the core of computer systems. Nowadays many communication, digital entertainment, portable devices, are controlled by them. A designer should know what types of components he needs, ways to reduce production costs and product reliable.
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CPU: Central Processing Unit I/O: Input /Output Bus: Address bus & Data bus Memory: RAM & ROM Timer Interrupt Serial Port Parallel Port
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Microprocessors:
General-purpose microprocessor
CPU for Computers No RAM, ROM, I/O on CPU chip itself Example Intels x86, Motorolas 680x0
Many chips on mothers board
Data Bus
RAM
ROM
I/O Port
Timer
Microcontroller :
A smaller computer On-chip RAM, ROM, I/O ports... Example Motorolas 6811, Intels 8051, Zilogs Z8 and PIC 16X
A single chip
Microcontroller
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Embedded System
Embedded system means the processor is embedded into that application. An embedded product uses a microprocessor or microcontroller to do one task only. In an embedded system, there is only one application software that is typically burned into ROM. Example printer, keyboard, video game player
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2.
3.
meeting the computing needs of the task efficiently and cost effectively speed, the amount of ROM and RAM, the number of I/O ports and timers, size, packaging, power consumption easy to upgrade cost per unit availability of software development tools assemblers, debuggers, C compilers, emulator, simulator, technical support wide availability and reliable sources of the microcontrollers.
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8051 microcontroller
Why to choose 8051 when there are several others available? 1.COST-low cost with approx. same specification. 2.FUTURE AVAILABILTY- Approx. 20 companies produce 8051 so easily available at present time and future. 3.SOFTWARE-softwares used to program 8051 are easily available and generally free of cost. 5/28/12 Mahdi Hassanpour
Features Of 8051
8-bit ALU, Accumulator and 8-bit Registers; hence it is an 8-bit microcontroller 8-bit data bus It can access 8 bits of data in one operation 16-bit address bus It can access 216 memory locations 64 KB (65536 locations) each of RAM and ROM On-chip RAM 128 bytes (data memory)
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On-chip ROM 4 kByte (program memory) Four byte bi-directional input/output port UART (serial port) Two 16-bit Counter/timers Two-level interrupt priority Power saving mode (on some derivatives) On-chip Clock Oscillator
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Block Diagram-8051
External interrupts Interrupt Control On-chip ROM for program code
Timer/Counter
On-chip RAM
Timer 1 Timer 0
Counter Inputs
OSC
Bus Control
4 I/O Ports
P0 P1 P2 P3
TxD RxD
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8051 (8031)
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Vcc pin 40;input pin Vcc provides supply voltage to the chip. The voltage source is +5V. GND pin 20;input pin ground XTAL1 and XTAL2 pins 19,18;input pin
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XTAL 2
RST pin 9 ,input reset It is an input pin and is active high normally low . If RST=1 for more than 2 machine cycle then 8051 will reset to default.
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18
9 RST
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EA pin 31,input
External Access Enable There is no on-chip ROM in 8031 and 8032 . The EA pin is connected to GND, processor fetches from external ROM. The EA connected to Vcc, processor fetches the code from internal ROM. Never left unconnected this pin.
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ALE pin 30,output Address latch enable It is an output pin and is active high. 8051 port 0 provides both address and data. The ALE pin is used for de-multiplexing the address and data by connecting to the G pin of the 74LS373 latch. ALE=1 ; processor fetches adress from external memory. ALE=0 ;processor fetches data from external memory.
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PSEN (pin 29): Program store Enable Generate read for external ROM. If there is external ROM then connect PSEN to GND otherwise left open circuit. Vpp (pin 31): Programming Voltage During the programming some part of 8051 requires 12 volt supply. This supply is provided by Vpp pin.
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I/O port pins The four ports P0, P1, P2, and P3. Each port uses 8 pins and each pin can bew programmed independently. All I/O pins are bi-directional means each port can receive and transmit data. So it is said that 8051 has 32 programmable input/output lines.
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The 8051 has four I/O ports Port 0 pins 32-39 P0 P0.0 P0.7 Port 1 pins 1-8 P1 P1.0 P1.7 Port 2 pins 21-28 P2 P2.0 P2.7 Port 3 pins 10-17 P3 P3.0 P3.7 Each port has 8 pins. Named P0.X X=0,1,...,7 , P1.X, P2.X, P3.X Ex P0.0 is the bit 0 LSB of P0 Ex P0.7 is the bit 7 MSB of P0 These 8 bits form a byte. Each port can be used as input or output (bi-direction).
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Port 0 (PIN32-39)
Port 1 is simply a bidirectional I/O port. Apart from this it also perform a special function in which it used to fetch lower 8 bit of address and data line(AD0-AD7 )while interfacing to external memory.
PORT AD LINE P0.0 AD0 P0.1 AD1 P0.2 AD2 P0.3 AD3 P0.4 AD4 P0.5 AD5 P0.6 P0.7 AD6 AD7
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Port 1 (Pin1-8)
Port 1 is simply a bidirectionaal input/output port. Means data can only be received or transmitted thorugh this port. No special fuction performed.
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Port 2 (Pin21-28)
Port 2 is simply a bidirectional port. As well as it is also used to fetch the upper 8 bit of address (A8-A15)while interfacing to external memory.
PORT2 ADRESS LINE P2.0 A8 P2.1 A9 P2.2 A10 P2.3 A11 P2.4 A12 P2.5 A13 P2.6 A14 P2.7 A15
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PORT3 (Pin10-17)
Port 3 is simply a bidirectional I/O port. It also perform some special functions of 8051.
P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 P3.6 P3.7 RXD TXD INT0 INT1 T0 T1 WR RD Mahdi Hassanpour 10 11 12 13 14 15 16 17
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Me mo ry
Or ga n iz ati o
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Registers
A B R0 R1 R2 R3 R4 R5 R6 R7 Some 8-bitt Registers of the 8051 Some 8051 16-bit Register PC PC DPTR DPH DPL
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Registers
8051The most widely used registers A (Accumulator): For all arithmetic and logic instructions B: It is the secondary accumulator.It is used in multiplication and division instruction.Otherwise it works as a normal register. DPTR (data pointer), and PC (program counter)
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Registers (continued)
8 general purpose registers named R0,R1,R2,R3,R4,R5,R6,R7. Registers (R0-R7) are placed in banks. Each Bank has its own R0 to R7 register. There are 4 banks. -bank0 -bank1 -bank2 -bank3. R0 to R7 are byte addressable registers.
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8k
0000H
32k
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30H 2FH Bit-Addressable RAM 20H 1FH 18H 17H 10H 0FH 08H 07H 00H Register Bank 3 Register Bank 2 (Stack) Register Bank 1
Register Bank 0
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The register used to access the stack is called SP (stack pointer) register. The stack pointer in the 8051 is only 8 bits wide, which means that it can take value 00 to FFH. When 8051 powered up, the SP register contains value 07.
2FH Bit-Addressable RAM 20H 1FH 18H 17H 10H 0FH 08H 07H 00H
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8051 has 256 byte ram in which 128 byte are GPR(general purpose registers) and 128 byte SFR (special function registers). GPR do not affect the operation of Microcontroller . SFR affect the operation of Microcontroller and are used in special conditions.
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SFR
Accessed by their names or by their addresses. The SFR registers have addresses between 80H and FFH. Not all the address space of 80 to FF is used by SFR. The unused locations 80H to FFH are reserved and must not be used by the8051 programmer
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P (Parity): If P=1 : the accumulator contains an odd parity. If P=0 : the accumulator contains an even parity. OV (Overflow flag): OV=1 : overflow occur OV=0 : no overflow AC (auxiliary carry): AC=1 when a.c. generated CY (carry flag): c=1 when carry generated. F0: General purpose status bit.
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INSTRUCTION BEGINS
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BIT INSTRUCTION: 1. Syntax: setb bit Example: setb 24h , setb P2.0 , set cy Note1: It sets the corresponding bit location equal to logic 1. Note2: bit address should be clearly defined in hexadecimal otherwise controller will store the value to its hexadecimal equivalent location. Example: setb 35 means 23h will be set.
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Note3: It can not be used with byte addressable memory. Example: setb R2 , setb P0 , setb A
etc.
2. Syntax: clr bit Note1: It will put logic 0 to the given bit adress. Example: clr 00h , clr P0.1 , clr 7Fh etc. Note2: Accumulator can be cleared by this. example: clr a Note3: All the caution for setb will be applied to this instruction Hassanpour 5/28/12 Mahdi
Byte Instruction: Addressing Modes: Syntax: mov destination , source 1. Immediate Addressing: a. To transfer Hexadecimal : Mov R2,#45h b. To transfer Decimal no. : Mov R2,#45 In this case it will treat it as a decimal no.45 decimal and 45 decimal or 2d hexadecimal means 2dH will be transferred to R2.
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C. To transfer binary no : mov R2,#10101011b D. To transfer Ascii : mov R2,#A Important points: 1. Mov a,#r1 : this is will lead error. 2. # mark is very necessary otherwise digit will be treated as memory location. 3. If first digit of hex. No. is alphabet then put 0 before no. Ex- mov R2,#0c4h
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2. Direct Addressing Mode: Example: mov r2,33h Note: In this case 33h will be considered as memory location and the content of 33h location will be transferred to r2. 3. Register Direct Addressing Mode: Example: mov a,r2 ; mov 25h,r5 etc. Note: Transfer between two register can not 5/28/12 Mahdi Hassanpour done by this method and result in error
4. Register Indirect Addressing Mode: Note: This mode work only with R0, R1 register. Example: mov 35h,#67h mov r1,#35h mov a,@r1 Note: Last step denotes the Register Indirect Adressing mode. In this casecontent of r1 that is 35h considered as adress and 5/28/12 Mahdi Hassanpour corresponding 67h will transferred to A.
Simulator: Top View Simulator Note: It only works at 32 bit computers. Using: 1st line : Header file $mod51 Just like #include<stdio.h> in C compiler. 2nd line: org adress (ROM) Example: org 0 , org 32h. >But we should use org 0 to save memory. >It is not necessary Hassanpour by default org 0. 5/28/12 Mahdi to write
1st program: WAP to store 72h to register r2. Solution: $mod51 org 0 mov r2,#72h end
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WAP to store 55h on adress 73h and then 73h to R1 of bank 2 and then transfer 55h to accumulator using register indirect addressing mode. Solution:
$mod51 org 0 Setb rs1 Clr rs0 mov 73h,#55h mov R2,#73h mov a,@R1 end
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Jumping Instruction:
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Syntax of unconditional jumping instruction: Jump instruction: Sjmp address/label Ajmp address/label Ljmp address/label Call Instruction: Acall address/label Lcall address/label Note : For everyMahdi Hassanpour call instruction there must be 5/28/12 a return instrunction i.e. RET
Conditional Call: Byte Condition: 1. Syntax: djnz operand, address Note: It decreases the operand by one, if not equal to zero it jumps on the specified row address. 2. Syntax: cjne destination, source ,address Note: Compare and jump if not equal. Source are always immediate data except when source is accumulator. 3. Syntax: jz/jnz address 5/28/12 Mahdi Hassanpour Note: jz and jnz both works only on accumulator A
Bit Condition: 1. Syntax: jb bit , label/address jump if bit=1 2. Syntax: jnb bit ,label/address jump if not bit, that is bit=0 3. Syntax: jbc bit , label/address jump if bit=1 and then clear bit=0 4. Syntax: jc label/address jump if carry cy=1 5/28/12 Mahdi Hassanpour 5. Syntax: jnc label/address
Label: a ROM address defined by a name. Note: 1. No two label can have same name. 2. To define a label simply put a colon after name. eg. ashish: , micro: etc. 3. To call any label use it with any jumping instruction. 4. A label name should not have register, instruction or library name of 8051. 5. A label should always start by a alphabet. 5/28/12label should always be defined in starting of the Mahdi Hassanpour 6. A
Rotational Instruction: Note: Rotational instruction works only on accumulator. Syntax: 1.Rotate left : rla 2.Rotate right: rr a 3.Rotate left through carry: rlc a 4.Rotate right through carry: rrc a Complement instruction: cpl bit Note: only applicable for bit addressable locations. It 5/28/12 Mahdi Hassanpour can also be used with accumulator.
Arithmatical & Logical Instruction: Addition: Syntax: add a,source Note1: Source can be address, immediate, register, B register. Note2: If addition exceeds 255, carry flag will be set to 1. Subtraction: Syntax: subb a, source Note1: If cy=0 & A>source => cy=0 Note2: If cy=0 & A<source => cy=1 Note3: If cy=1 & A>source => cy=1 Note4: If cy=1 & A<source => cy=0
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Multiplication: Syntax: mul AB Note: This instruction should be used as it is. B stores the upper 8 bit and A stores the lower 8 bit of result. Division: Syntax: div AB Note: A stores Quotient and B stores Remainder after the execution.
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Arithmatic & Logical Instruction: AND: anl destination, source OR: orl destination, source XOR: xrl destination, source Increment: inc operand Decrement: dec operand No Operation: NOP Swap instruction: swap A Note: swap interchanges the upper 4 bit of A 5/28/12 Mahdi Hassanpour to lower 8 bit of A.
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TMOD Register:
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TCON Register:
TF1: Timer 1 overflow flag. TR1: Timer 1 run control bit. TF0: Timer 0 overflag. TR0: Timer 0 run control bit. IE1: External interrupt 1 edge flag. IT1: External interrupt 1 type flag. IE0: External interrupt 0 edge flag. IT0: External interrupt 0 type flag.
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Interrupt :
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EA : Global enable/disable.
--: Undefined.
ET2 :Enable Timer 2 interrupt. ES :Enable Serial port interrupt. ET1 :Enable Timer 1 interrupt. EX1 :Enable External 1 interrupt. ET0 : Enable Timer 0 interrupt. EX0 : Enable External 0 interrupt.
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