Timing Budgeting Flow

Timing Budgeting Flow
RENESAS Group CONFIDENTIAL
2010 Renesas Mobile Corporation. All rights reserved.
Why Budgeting?
In the hierarchical design methodology, budgeting generates SDC timing constraints for block-level implementation Good budgeting inputs generate SDC with good quality No over- or underconstrained SDC
Good SDC achieves good implementation of blocks Early
detection of feasibility of top-level timing closure Easier to close top-level timing after implementing blocks
What is Budgeting?
The process of distributing positive and negative slack and creating block-level budget SDC files
Budgeter determines block input and output delays by analyzing delays of inter block timing arcs
Budgeter does not modify timing, only distributes slacks among blocks.
What is Budgeting
Budgeting outputs all SDC constraints required to fully describe the timing environment for blocks Delay setting for I/O (budget allocation) set_input_delay, set_output_delay
Load/drive setting for I/O set_load, set_drive,

set_driving_cell
Operating condition setting set_operating_conditions
Timing exception setting set_false_path,
set_multicycle_path, set_disable_timing
etc
Achieve Accurate Budgeting

More accurate timing, more accurate I/O budgets Need timing
optimization
More accurate pin location, more accurate wire capacitance estimation through I/O pins Need pin assignment Better I/O budgets & wire capacitance, better SDC Ensure better
block implementation
Easier to close top-level timing after implementing blocks
Quality of budgeting depends on quality of inputs
Steps To Achieve Accurate Budgeting

Make timing more correlated to optimized design Placement &
legalization
Full-chip in place optimization Assign pin locations to well estimate wire capacitance through I/O pins for each block Plan group-aware global routing Pin-cutting (pin assignment based on global route)
Pre-budgeting flow: complete all the above steps
Pre-Budgeting & Budgeting Flow
Budgeting flow Check timing environment Perform timing budgeting Check budgeting results
Timing Budgeting Flow Check timing environment check_timing Check

unconstrained paths
report_timing Check timing is reasonable for budgeting check_fp_timing_environment Check feasibility of the
design and its timing constraints
Perform timing budgeting allocate_fp_budgets Allocate budgets between

blocks and create SDC for blocks
check_fp_budget_result
Generate a report which allows you to compare real delay with budgeted delay
Timing Budgeting Flow check_timing

Check unconstrained endpoints All timing endpoints in the design should be constrained If not, might be due to SDC error: a clock definition is missing or Design error: some circuits are disconnected
Timing Budgeting Flow

report_timing
Check the most violating paths in the design Negative

slack in the design should be reasonable compared to the clock period (20% or less), or timing closure might not be achievable Budgeter creates SDC with better quality if timing more correlates the final optimized implementation.
Timing Budgeting Flow Allocate Budgets
Allocate budgets Tcl command and partial list of options:

allocate_fp_budgets [-black_box_cells bb_cells_list] [-fixed_delay_objects objects_delay_list] [-file_format_spec file_format_string] [-no_interblock_logic] [-no_split] [-cells budget_cell_names] [-incremental] [-exploration] [-create_qtm_models] [-qtm_model_path] [-print_partial_constraints] Check man page for detailed information
Budgeting Based On Crosstalk Effect Do budgeting using noise-induced delay Timer will estimate
coupling effect based on congestion map
HierSi information will be written out on plan group pins
Store top-level xtalk effect for block implementation
Budgeter will store effective aggressor driving strength for input pins and coupling cap across block boundary into block CEL view
true by default
set budgeting_enable_hier_si true The variable is set to
Hierarchical Timing Closure
Timing Budgeting on ILM (Re-Budgeting)

Important:
The budgeter only can write out the interface path constraints when generating the timing budget using interface logic models(ILMs) for the soft macros From the D-2010.03-SP3 release, by default the budgeter does not write out the SDC for the blocks with partial netlist. The SDC file is written out if you specify -print_partial_constraints Do not use the generated ASCII sdc file for block implementation. The ASCII sdc file generated by ILM budgeting only contains the interface path constraints; it does not contain the block internal constraints.
The block CEL view is updated with new budgets, no need to load the new sdc file

After you generate the timing budgets using ILM models, the .CEL views of the associated soft macros are updated automatically to reflect the new interface path and block internal constraints. Note this does not work if you have split library for the soft macro. All the blocks have to be in the same library as main library To write out the complete ASCII sdc interface path and internal block constraints file for the soft macros, open the associated soft macro .CEL views and run the write_sdc command.
Timing Budgeting Flow Summary

Budgeting generates SDC for implementing blocks in the hierarchical flow Budgeter needs pre-budgeting flow to achieve good estimation for budgeting Quality of budgeting depends on quality of inputs Users run budgeting flow to check budgeting environment, invoke budgeter to create SDC, and check final budgeting results

Timing Budgeting Flow

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Timing Budgeting Flow

RENESAS Group CONFIDENTIAL

2010 Renesas Mobile Corporation. All rights reserved.

Good SDC achieves good implementation of blocks Early

RENESAS Group CONFIDENTIAL

2010 Renesas Mobile Corporation. All rights reserved.

RENESAS Group CONFIDENTIAL

2010 Renesas Mobile Corporation. All rights reserved.

Load/drive setting for I/O set_load, set_drive,

Operating condition setting set_operating_conditions

Timing exception setting set_false_path,

RENESAS Group CONFIDENTIAL

2010 Renesas Mobile Corporation. All rights reserved.

Achieve Accurate Budgeting

Easier to close top-level timing after implementing blocks

Quality of budgeting depends on quality of inputs

RENESAS Group CONFIDENTIAL

2010 Renesas Mobile Corporation. All rights reserved.

Steps To Achieve Accurate Budgeting

Pre-budgeting flow: complete all the above steps

RENESAS Group CONFIDENTIAL

2010 Renesas Mobile Corporation. All rights reserved.

Pre-Budgeting & Budgeting Flow

RENESAS Group CONFIDENTIAL

2010 Renesas Mobile Corporation. All rights reserved.