Ec522 8051 10

M_Nokhodchian @ yahoo.
com
Microprocessors 1-1
The 8051 has 2 timers/counters:

timer/counter 0 timer/counter 1
They can be used as 1. The timer is used as a time delay generator.

The clock source is the internal crystal frequency of the 8051.
2. An event counter.
External input from input pin to count the number of events on registers. These clock pulses cold represent the number of people passing through an entrance, or the number
M_Nokhodchian @ yahoo.com Microprocessors 1-2
M_Nokhodchian @ yahoo.com
Microprocessors 1-3
Set the initial value of registers Start the timer and then the 8051 counts up. Input from internal system clock (machine cycle) When the registers equal to 0 and the 8051 sets a bit to denote time out 8051
Set Timer 0 P2 P1
TH0 TL0
Microprocessors 1-4
to LCD
Count the number of events

Show the number of events on registers External input from T0 input pin (P3.4) for Counter 0 External input from T1 input pin (P3.5) for Counter 1 8051 External input from Tx input pin. We use Tx to denote T0 or T1. TH0 P1
TL0
to LCD
P3.4 a switch
T0
Microprocessors 1-5
TH0, TL0, TH1, TL1 TMOD (Timer mode register) TCON (Timer control register)
Microprocessors 1-6
Timer mode register: TMOD

MOV TMOD,#21H An 8-bit register Set the usage mode for two timers
Set lower 4 bits for Timer 0 (Set to 0000 if not used) Set upper 4 bits for Timer 1 (Set to 0000 if not used)
(MSB) Not bit-addressable GATE C/T M1 M0 GATE C/T M1 Timer 1 Timer 0

(LSB) M0
Microprocessors 1-7
Every timer has a means of starting and stopping.

GATE=0
Internal control The start and stop of the timer are controlled by way of software. Set/clear the TR for start/stop timer. SETB TR0 CLR TR0
GATE=1
External control The hardware way of starting and stopping the timer by software and an external source. Timer/counter is enabled only while the INT pin is high and the TR control pin is set (TR).
(MSB) GATE C/T M1 Timer 1

M0 GATE C/T M1 Timer 0
(LSB) M0
Microprocessors 1-8
TMOD REGISTER
C/T
Timer or counter selected cleared for timer operation (input from internal system clock). Set for counter operation (input from Tx input pin). C/T=0 for TIME DELAY gets pulses from crystal. C/T=1for COUNTER gets pulses from PINS 14 & 15, ie, P3.4 & P3.5
(MSB) GATE C/T M1 Timer 1 M0 GATE C/T M1 Timer 0 (LSB) M0
Microprocessors 1-9
TMOD REGISTER
M1 M0 Mode 0 0 0 0 1 1 0 1 2
Operating Mode 13-bit timer mode 16-bit timer mode 8-bit auto reload
Split timer mode
8-bit THx + 5-bit TLx (x= 0 or 1) 8-bit THx + 8-bit TLx 8-bit auto reload timer/counter; THx holds a value which is to be reloaded into TLx each time it overflows.
(MSB) GATE C/T M1 Timer 1 M0 GATE C/T M1 Timer 0
(LSB) M0
Microprocessors 1-10
Timer control register: TMOD Upper nibble for timer/counter, lower nibble for interrupts TR (run control bit) TR0 for Timer/counter 0; TR1 for Timer/counter 1. TR is set by programmer to turn timer/counter on/off. TR=0: off (stop) TR=1: on (start)
(MSB) TF1 TR1 TF0 TR0 Timer 1 Timer0

(LSB) IE1 IT1 IE0 IT0 for Interrupt

TF (timer flag, control flag)

TF0 for timer/counter 0; TF1 for timer/counter 1. TF is like a carry. Originally, TF=0. When TH-TL roll over to 0000 from FFFFH, the TF is set to 1.
TF=0 : not reach TF=1: reach If we enable interrupt, TF=1 will trigger ISR.
(MSB) TF1 TR1 TF0 TR0 Timer 1 Timer0

(LSB) IE1 IT1 IE0 IT0 for Interrupt

EQUIVALENT INSTRUCTIONS FOR TIMER CONTROL REGISTER

For timer 0 SETB TR0 CLR TR0 SETB TF0 CLR TF0 For timer 1 SETB TR1 CLR TR1 SETB TF1 CLR TF1 = = = = SETB TCON.6 CLR TCON.6 SETB TCON.7 CLR TCON.7 = = = = SETB TCON.4 CLR TCON.4 SETB TCON.5 CLR TCON.5
In following, we all use timer 0 as an example.

16-bit timer (TH0 and TL0) TH0-TL0 is incremented continuously when TR0 is set to 1. And the 8051 stops to increment TH0-TL0 when TR0 is cleared. The timer works with the internal system clock. In other words, the timer counts up each machine cycle. When the timer (TH0-TL0) reaches its maximum of FFFFH, it rolls over to 0000, and TF0 is raised.
Programmer should check TF0 and stop the timer 0.

1. Choose mode 1 timer 0 MOV TMOD,#01H 2. Set the original value to TH0 and TL0. MOV TH0,#FFH MOV TL0,#FCH 3. You had better to clear the flag to monitor: TF0=0. CLR TF0 4. Start the timer. SETB TR0
5.The 8051 starts to count up by incrementing the TH0-TL0.

TR0=1 Start timer
TH0-TL0= FFFCH,FFFDH,FFFEH,FFFFH,0000H
TR0=0
TH0 TL0
Stop timer
FFFC
TF = 0
FFFD
TF = 0
TF
FFFE TF = 0
FFFF
TF = 0
0000 TF = 1
Monitor TF until TF=1

6. When TH0-TL0 rolls over from FFFFH to 0000, the 8051 set TF0=1.
TH0-TL0= FFFEH, FFFFH, 0000H (Now TF0=1)
7. Keep monitoring the timer flag (TF) to see if it is raised.

AGAIN: CLR TR0 JNB TF0, AGAIN
8. Clear TR0 to stop the process. 9. Clear the TF flag for the next round.
CLR TF0
XTAL oscillator
12
C/T = 0
Timer overflow flag

TH TL TF
TR
TF goes high when FFFF
(a) in hex
(FFFF YYXX + 1) 1.085 s where YYXX are TH, TL initial values respectively. Notice that values YYXX are in hex.
(b) in decimal Convert YYXX values of the TH, TL register to decimal to get a NNNNN decimal number then (65536 NNNNN) 1.085 s
Write a program to Generate a square wave of 50% duty cycle on the P1.5. Timer 0 be used to generate the time delay.
square wave of 50% duty on P1.5 Timer 0 is used ;each loop is a half clock MOV TMOD,#01 ;Timer 0,mode ;1(16-bit) HERE: MOV TL0,#0F2H ;Timer value = ;FFF2H MOV TH0,#0FFHP1.5 CPL P1.5 50% 50% ACALL DELAY whole clock SJMP HERE
;generate delay using timer 0 DELAY: SETB TR0 ;start the timer 0 AGAIN:JNB TF0,AGAIN CLR TR0 ;stop timer 0 CLR TF0 ;clear timer 0 flag RET
FFF2
TF0 = 0
FFF3
TF0 = 0
FFF4
TF0 = 0
FFFF
TF0 = 0
0000
TF0 = 1
Solution: In the above program notice the following steps. 1. TMOD = 0000 0001 is loaded. 2. FFF2H is loaded into TH0 TL0. 3. P1.5 is toggled for the high and low portions of the pulse. 4. The DELAY subroutine using the timer is called. 5. In the DELAY subroutine, timer 0 is started by the SETB TR0 instruction. 6. Timer 0 counts up with the passing of each clock, which is provided by the crystal oscillator. As the timer counts up, it goes through the states of FFF3, FFF4, FFF5, FFF6, FFF7, FFF8, FFF9, FFFA, FFFB, FFFC, FFFFD, FFFE, FFFFH. One more clock rolls it to 0, raising the timer flag (TF0 = 1). At that point, the JNB instruction falls through. 7. Timer 0 is stopped by the instruction CLR TR0. The DELAY subroutine ends, and the process is repeated. Notice that to repeat the process, we must reload the TL and TH registers, and start the timer again (in the main program).
The following program generates a square wave on pin P1.5 continuously using timer 1 for a time delay. Find the frequency of square wave if XTAL=11.0592 MHz. In your calculations do not include the overhead due to instructions in the loop.
This program generates a square wave on pin P1.5 Using timer 1 Find the frequency.(dont include the overhead of instruction delay) XTAL = 11.0592 MHz MOV TMOD,#10H ;timer 1, mode 1 AGAIN:MOV TL1,#34H ;timer value=3476H MOV TH1,#76H SETB TR1 ;start BACK: JNB TF1,BACK CLR TR1 ;stop CPL P1.5 ;next half clock CLR TF1 ;clear timer flag 1 SJMP AGAIN ;reload timer1
Solution: FFFFH 7634H + 1 = 89CCH = 35276 clock count Half period = 35276 1.085 s = 38.274 ms Whole period = 2 38.274 ms = 76.548 ms Frequency = 1/ 76.548 ms = 13.064 Hz.
Note Mode 1 is not auto reload then the program must reload the TH1, TL1 register every timer overflow if we want to have a continuous wave.
Assume that XTAL = 11.0592 MHz . And we know desired delay how to find the values for the TH,TL ?
1. 2. 3. 4. Divide the delay by 1.085 s and get n. Perform 65536 n Convert the result of Step 2 to hex (yyxx ) Set TH = yy and TL = xx.
Assuming XTAL = 11.0592 MHz, write a program to generate a square wave of 50 Hz frequency on pin P2.3.
Solution: 1. The period of the square wave = 1 / 50 Hz = 20 ms. 2. The high or low portion of the square wave = 10 ms. 3. 10 ms / 1.085 s = 9216 4. 65536 9216 = 56320 in decimal = DC00H in hex. 5. TL1 = 00H and TH1 = DCH.
MOV AGAIN: MOV MOV SETB BACK: JNB CLR CPL CLR SJMP
TMOD,#10H TL1,#00 TH1,#0DCH TR1 TF1,BACK TR1 P2.3 TF1 AGAIN
;timer 1, mode 1 ;Timer value = DC00H ;start ;stop ;clear timer flag 1 ;reload timer since ;mode 1 is not ;auto-reload
The size of the time delay depends on two factors: They crystal frequency The timers 16-bit register, TH & TL The largest time delay is achieved by making TH=TL=0. What if that is not enough? Next Example show how to achieve large time delay
Examine the following program and find the time delay in seconds. Exclude the overhead due to the instructions in the loop.
MOV TMOD,#10H MOV R3,#200 AGAIN: MOV TL1,#08 MOV TH1,#01 SETB TR1 BACK: JNB TF1,BACK CLR TR1 CLR TF1 DJNZ R3,AGAIN Solution: TH TL = 0108H = 264 in decimal 65536 264 = 65272. One of the timer delay = 65272 1.085 s = 70.820 ms Total delay = 200 70.820 ms = 14.164024 seconds
A running timer will be incremented

11,059,000 / 12 = 921,583 times per second. Unlike instructions--some of which require 1 machine cycle, others 2, and others 4--the timers are consistent: They will always be incremented once per machine cycle. Thus if a timer has counted from 0 to 50,000 you may calculate: 50,000 / 921,583 = .0542 seconds have passed. In plain English, about half of a tenth of a second, or onetwentieth of a second.
Obviously its not very useful to know .0542 seconds have passed. If you want to execute an event once per second you would have to wait for the timer to count from 0 to 50,000 18.45 times. How can you wait "half of a time?" You can not. So we come to another important calculation. Lets say we want to know how many times the timer will be incremented in .05 seconds.
We can do simple multiplication: .05 * 921,583 = 46,079.15.
This tells us that it will take .05 seconds (1/20th of a second) to count from 0 to 46,079. Actually, it will take it .049999837 seconds--so were off by .000000163 seconds--however, thats close enough for government work. Consider that if you were building a watch based on the 8051 and made the above assumption your watch would only gain about one second every 2 months. This is accurate enough for most applications A watch would have only gained one second every two months!
If you know it takes 1/20th of a second to count from 0 to 46,079 and you want to execute some event every second you simply wait for the timer to count from 0 to 46,079 twenty times; then you execute your event, reset the timers, and wait for the timer to count up another 20 times. In this manner you will effectively execute your event once per second, accurate to within thousandths of a second.
MODE 0
It is exactly same as mode 1 except it is a 13-bit timer instead of 16-bit. The timer can hold values between 0000 to 1FFF in TH TL. Therefore, when timer reaches its maximum of 1FFFH, it rolls over to 0000, and TF is raised.
13-bit Time Mode (mode 0)

Timer mode "0" is a 13-bit timer. This is a relic that was kept around in the 8051 to maintain compatability with its predecesor, the 8048. Generally the 13-bit timer mode is not used in new development. When the timer is in 13-bit mode, TLx will count from 0 to 31. When TLx is incremented from 31, it will "reset" to 0 and increment THx. Effectively 13 bits of the two timer bytes are used: bits 0-4 of TLx and bits 0-7 of THx.
The timer can only a contain 8192 as a value. If you set a 13-bit timer to 0, it will overflow back to zero 8192 machine cycles later.
1. This mode configures timer 0 as a 13-bit timer which consists of all 8 bits of TH0 and the lower 5 bits of TL0. 2. As a result, the Timer 0 uses only 13 of 16 bits. How does it operate? 3. Each coming pulse causes the lower register bits to change their states. 4. After receiving 32 pulses, this register is loaded and automatically cleared, while the higher byte (TH0) is incremented by 1. 5. This process is repeated until registers count up 8192 pulses. 6. After that, both registers are cleared and counting starts from 0.
8-bit Time Mode (mode 2)

Timer mode "2" is an 8-bit auto-reload mode. What is that, you may ask? Simple. When a timer is in mode 2, THx holds the "reload value" and TLx is the timer itself. Thus, TLx starts counting up. When TLx reaches 255 and is subsequently incremented, instead of resetting to 0 (as in the case of modes 0 and 1), it will be reset to the value stored in THx.
It is necessary to constantly count up 55 pulses generated by the clock.

If mode 1 or mode 0 is used, It is necessary to write the number 200 to the timer registers and constantly check whether an overflow has occured, i.e. whether they reached the value 255. When it happens, it is necessary to rewrite the number 200 and repeat the whole procedure.
The same procedure is automatically performed by the microcontroller if set in mode 2. In fact, only the TL0 register operates as a timer, while another (TH0) register stores the value from which the counting starts. When the TL0 register is loaded, instead of being cleared, the contents of TH0 will be reloaded to it. Therefore, in order to register each 55th pulse, the best solution is to write the number 200 to the TH0 register and Microprocessors 1-46 M_Nokhodchian @ yahoo.com
Mode 2 is commonly used for setting baud rates for serial communication.
If TH0 holds the value FDh and TL0 holds the value FEh. If we were to watch the values of TH0 and TL0 for a few machine cycles this is what wed see:
Machine Cycle 1 2 TH0 Value FDh FDh TL0 Value FEh FFh
3 FDh FDh 4 FDh FEh 5 FDh FFh 6 FDh FDh 7 FDh FEh TH0 never changed. In mode 2, THx is set. TLx is is incremented.
Split Timer Mode (mode 3)

Timer mode "3" is a split-timer mode. When Timer 0 is placed in mode 3, it essentially becomes two separate 8-bit timers. Timer 0 is TL0 and Timer 1 is TH0. Both timers count from 0 to 255 and overflow back to 0. All the bits that are related to Timer 1 will now be tied to TH0.
While Timer 0 is in split mode, the real Timer 1 (i.e. TH1

and TL1) can be put into modes 0, 1 or 2.
In mode 3, also known as split mode, the Timer breaks into two 8-bit Timers that can count from 00H up to FFH. The initial values are loaded into the higher byte and lower byte of the Timer. In this case the start and flag bits associated with the other Timer are now associated with high byte Timer. So one cannot start or stop the other Timer. The other Timer can be used in modes 0, 1 or 2 and is updated automatically for every machine cycle
For example, if Timer0 is used in split mode, TH0 and TL0 will become separate Timers. The start and flag bits associated with Timer1 will now be associated with the TH0. Timer 1 cannot be stopped or started, but will be updated for every machine cycle. Split mode is useful when two Timers are required in addition to a baud rate generator.
In addition, all the control bits of 16-bit Timer 1 (consisting of the TH1 and TL1 register), now control the 8-bit Timer 1. Even though the 16-bit Timer 1 can still be configured to operate in any of modes (mode 1, 2 or 3), it is no longer possible to disable it as there is no control bit to do it. Thus, its operation is restricted when timer 0 is in mode 3.
The TCON (88h) SFR. Bits 7 to 4 are for for timers. 3 to 0 for Communication
Bit Name 7 6 5 TF1 TR1 TF0 Bit Address 8Fh 8Eh 8Dh Explanation of Function Timer 1 Overflow. This bit is set by the microcontroller when Timer 1 overflows. Timer 1
Timer 1 Run. When this bit is set Timer 1 is turned on. When this bit is clear Timer 1 1 is off. Timer 0 Overflow. This bit is set by the microcontroller when Timer 0 overflows. 0
TR0
8Ch
Timer 0 Run. When this bit is set Timer 0 is turned on. When this bit is clear Timer 0 0 is off.
TCON IS BIT ADDRESABLE

Reading the Timer

There are two common ways of reading the value of a 16bit timer. Read the actual value of the timer as a 16-bit number. Detect when the timer has overflowed.
Reading the value of a Timer

In an 8-bit mode--that is, i.e., in 8-bit AutoReload mode or in split timer mode, read the 1-byte value of the timer.
If the high byte read the second time is not the same as the high byte read the first time you repeat the cycle. In code, this would appear as:
REPEAT: MOV A,TH0
MOV R0,TL0 CJNE A,TH0,REPEAT

The accumulator gets of Timer 0. Load R0 with the low byte of Timer 0. Check if the high byte of Timer 0, stored in the Accumulator, is the same as the current Timer 0 high byte. ALTERNATELY turn off the timer run bit (i.e. CLR TR0), read the timer value, and then turn on the timer run bit (i.e. SETB TR0).
. high .byte .
Detecting Timer Overflow When a timer overflows from its highest value back to 0, the microcontroller automatically sets the TFx bit in the TCON register. If TF0/TF1 is set it means that timer 0 has overflowed. Used to provide a fixed delay. The 8051 takes 1/20th of a second to count from 0 to 46,079. To use the TFx flag to indicate when 1/20th of a second has passed, the timer has to be initialised to 65536 less 46079, or 19,457. With the timer set to 19,457, 1/20th of a second later the timer will overflow.
Timing the length of events The 8051 can be used to time the length of events. The crude method applied to a case could be Let's say we're trying to save electricity in the office and we're interested in how long a light is turned on each day. When the light is turned on, we want to measure time. When the light is turned off we don't. One option would be to connect the lightswitch to one of the pins, constantly read the pin, and turn the timer on or off based on the state of that pin. While this would work fine, the 8051 provides us with an easier method of accomplishing this.
Better way is to use GATE0 bit of TMOD SFR. With this as 0, the timer runs regardless of the state of the external pins. An external pin can control the timers running/not running. Connect the lightswitch to pin INT0 (P3.2) on the 8051 and set the bit GATE0. When GATE0 is set Timer 0 will only run if P3.2 is high. When P3.2 is low (i.e., the lightswitch is off) the timer will automatically be stopped. Thus, with no control code whatsoever, the external pin P3.2 can control whether or not our timer is running or not.
USING TIMERS AS EVENT COUNTERS Let's say you had a sensor placed across a road that would send a pulse every time a car passed over it. This could be used to determine the volume of traffic on the road. We could attach this sensor to one of the 8051's I/O lines and constantly monitor it, detecting when it pulsed high and then incrementing our counter when it went back to a low state. This is not terribly difficult, but requires some code. Let's say we hooked the sensor to P1.0; the code to count cars passing would look something like this:
JNB P1.0,$
JB P1.0,$ INC COUNTER
;If a car hasn't raised the signal, keep waiting

;The line is high which means the car is on the sensor right now ;The car has passed completely, so we count it
With JNB P1.0,$ waiting for a car to pass. STUCK. 8051 provides "C/T0 bit in TCON SFR i.e., it's bit 2 (TCON.2). If the bit is clear then timer 0 will be incremented every machine cycle. If C/T0 set, timer 0 will monitor the P3.4 line. Instead of being incremented every machine cycle, timer 0 will count events on the P3.4 line. Connect sensor to P3.4. Then, reading the value of timer 0, will have number of cars that have passed.
What does timer 0 actually "count?" . It counts 1-0 transitions on the P3.4 line. This means that when a car first runs over our sensor it will raise the input to a high ("1") condition. At that point the 8051 will not count anything since this is a 0-1 transition. When the car has passed the sensor will fall back to a low ("0") state. This is a 1-0 transition and at that instant the counter will be incremented by 1.
8051 checks the P3.4 line each instruction cycle (12 clock cycles).
If P3.4 is low, goes high, and goes back low in 6 clock cycles it will probably not be detected by the 8051.
Capable of counting events that occur at a maximum of 1/24th the rate of the crystal frequency.
If the crystal frequency is 12.000 Mhz it can count a maximum of 500,000 events per second (12.000 Mhz * 1/24 = 500,000). If the event being counted occurs more than 500,000 times per second it will not be able to be accurately counted by the 8051.

Ec522 8051 10

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Ec522 8051 10

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M_Nokhodchian @ yahoo.

The 8051 has 2 timers/counters:

They can be used as 1. The timer is used as a time delay generator.

Count the number of events

Timer mode register: TMOD

(MSB) Not bit-addressable GATE C/T M1 M0 GATE C/T M1 Timer 1 Timer 0

Every timer has a means of starting and stopping.

(MSB) GATE C/T M1 Timer 1

M0 GATE C/T M1 Timer 0

Split timer mode

(MSB) GATE C/T M1 Timer 1 M0 GATE C/T M1 Timer 0

(MSB) TF1 TR1 TF0 TR0 Timer 1 Timer0

(LSB) IE1 IT1 IE0 IT0 for Interrupt

TF (timer flag, control flag)

(MSB) TF1 TR1 TF0 TR0 Timer 1 Timer0

(LSB) IE1 IT1 IE0 IT0 for Interrupt

EQUIVALENT INSTRUCTIONS FOR TIMER CONTROL REGISTER

In following, we all use timer 0 as an example.

Programmer should check TF0 and stop the timer 0.

5.The 8051 starts to count up by incrementing the TH0-TL0.

Monitor TF until TF=1

7. Keep monitoring the timer flag (TF) to see if it is raised.

Timer overflow flag

TF goes high when FFFF

TMOD,#10H TL1,#00 TH1,#0DCH TR1 TF1,BACK TR1 P2.3 TF1 AGAIN

A running timer will be incremented

We can do simple multiplication: .05 * 921,583 = 46,079.15.

13-bit Time Mode (mode 0)

8-bit Time Mode (mode 2)

It is necessary to constantly count up 55 pulses generated by the clock.

Split Timer Mode (mode 3)

While Timer 0 is in split mode, the real Timer 1 (i.e. TH1

TCON IS BIT ADDRESABLE

Reading the Timer

Reading the value of a Timer

MOV R0,TL0 CJNE A,TH0,REPEAT

;If a car hasn't raised the signal, keep waiting

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