Service Manual
LG-T395
Table Of Contents
1. INTRODUCTION 3
1.1 Purpose3
1.3 Abbreviations5
2. PERFORMANCE 7
5. DOWNLOAD109
6. BLOCK DIAGRAM122
7. CIRCUIT DIAGRAM123
3. TECHNICAL BRIEF14
3.1 Digital Main Processor 14
9. PCB LAYOUT133
11.1 Introduction136
3.7 BT module 44
11.3 Tx Test138
11.4 Rx Test139
12.AUTO CALIBRATION141
12.1 Overview141
4. TROUBLE SHOOTING62
12.5 AGC149
4.1 RF Component 62
12.6 APC149
4.2 RX Trouble 63
12.7 ADC149
13.3 Accessory172
--
1. INTRODUCTION
1. INTRODUCTION
1. INTRODUCTION
1.1 Purpose
This manual provides the information necessary to repair, calibration, description and download the features of
this model.
B. Incidence of Harm
If a telephone company determines that the equipment provided to customer is faulty and possibly causing
harm or interruption in service to the telephone network, it should disconnect telephone service until repair can
be done. A telephone company may temporarily disconnect service as long as repair is not done.
C. Changes in Service
A local telephone company may make changes in its communications facilities or procedure. If these changes
could reasonably be expected to affect the use of the this phone or compatibility with the network, the
telephone company is required to give advanced written notice to the user, allowing the user to take
appropriate steps to maintain telephone service.
D. Maintenance Limitations
Maintenance limitations on this model must be performed only by the manufacturer or its authorized agent.
The
e user
use may
ay not
ot make
a e any
a y changes
c a ges and/or
a d/o repairs
epa s expect
e pect as specifically
spec ca y noted
oted in this
t s manual.
a ua . Therefore,
e e o e, note
ote
that unauthorized alternations or repair may affect the regulatory status of the system and may void any
remaining warranty.
--
1. INTRODUCTION
2. INTRODUCTION
E. Notice of Radiated Emissions
This model complies
p
with rules regarding
g
g radiation and radio frequency
q
y emission as defined byy local regulatory
g
y
agencies. In accordance with these agencies, you may be required to provide information such as the following to
the end user.
F. Pictures
The pictures in this manual are for illustrative purposes only; your actual hardware may look slightly different.
ATTENTION
Boards, which contain Electrostatic Sensitive Device (ESD), are indicated
by the sign. Following information is ESD handling:
Service personnel should ground themselves by using a wrist strap when exchange system
boards.
When repairs are made to a system board, they should spread the floor with anti-static mat
which is also grounded.
Use a suitable, grounded soldering iron.
Keep sensitive parts in these protective packages until these are used.
When returning system boards or parts like EEPROM to the factory, use the protective
package as described.
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1. INTRODUCTION
1. INTRODUCTION
1.3 Abbreviations
F the
For
th purposes off thi
this manual,l ffollowing
ll i abbreviations
bb i ti
apply:
l
APC
BB
Baseband
BER
CC-CV
DAC
DCS
dBm
DSP
EEPROM
ESD
Electrostatic Discharge
FPCB
GMSK
GPIB
GSM
IPUI
IF
Intermediate Frequency
q
y
LCD
LDO
LED
OPLL
Off t Phase
Offset
Ph
Locked
L k d Loop
L
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1. INTRODUCTION
1. INTRODUCTION
PAM
PCB
PGA
PLL
PSTN
RF
Radio Frequency
RLR
RMS
RTC
SAW
SIM
SLR
SRAM
PSRAM
Pseudo SRAM
STMR
TA
Travel Adapter
TDD
TDMA
UART
VCO
VCTCXO
WAP
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2. PERFORMANCE
2. PERFORMANCE
2. SYSTEM SPECIFICATION
Stand by TIME
Talk time
Feature
Comment
Stand by time
Charging time
Approx 3hours
RX Sensitivity
TX output power
GPRS compatibility
Class 12
3V / 1.8V
Display
Status Indicator
ANT
EAR Phone Jack
PC Synchronization
Speech coding
Yes
Vibrator
Yes
Loud Speaker
Yes
Voice Recoding
Yes
Microphone
Yes
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2. PERFORMANCE
2. SYSTEM SPECIFICATION
Item
Feature
S
Speaker/Receiver
k /R i
18 12
18x12
SSpeaker/
k 1107
/ Receiver
R Receiver
i
18x12
Speaker/
Travel Adapter
Yes
MIDI
Camera
3.0M
2.0MFF
FF
Bluetooth / FM Radio
Comment
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--
2. PERFORMANCE
2. SYSTEM SPECIFICATION
Description
Specification
GSM850
TX: 824 ~ 849 MHz
RX: 869 ~ 894 MHz
EGSM
TX: 880 ~ 915MHz
RX: 925 ~ 960 MHz
DCS
TX: 1710 ~ 1785 MHz
RX: 1805 ~ 1880 MHz
PCS
TX: 1850 ~ 1910 MHz
RX: 1930 ~ 1990 MHz
Frequency Band
Phase Error
Frequency Error
Power Level
Level
Power
33dBm
Toler.
Level
Power
Toler.
2dB
13
17dBm
3dB
31dBm
3dB
14
15dBm
3dB
29dBm
3dB
15
13dBm
3dB
27dBm
3dB
16
11dBm
5dB
25dBm
3dB
17
9dBm
5dB
10
23dBm
3dB
18
7dBm
5dB
11
21dBm
3dB
19
5dBm
5dB
12
19dBm
3dB
Level
Power
Toler.
Level
Power
Toler.
30dBm
2dB
14dBm
3dB
28dBm
3dB
12dBm
4dB
26dBm
3dB
10
10dBm
4dB
24dBm
3dB
11
8dBm
4dB
22dBm
3dB
12
6dBm
4dB
20dBm
3dB
13
4dBm
4dB
DCS/PCS
18dBm
3dB
14
2dBm
5dB
16dBm
3dB
15
0dBm
5dB
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2. PERFORMANCE
2. SYSTEM SPECIFICATION
Item
Description
Specification
GSM850/ EGSM
Offset from Carrier (kHz).
Output RF Spectrum
(due to modulation)
Max. dBc
100
+0.5
200
-30
250
-33
400
-60
600~ <1,200
-60
1,200~ <1,800
-60
1,800~ <3,000
-63
3,000~ <6,000
-65
6 000
6,000
-71
71
DCS/PCS
Offset from Carrier (kHz).
Max. dBc
100
+0.5
200
-30
250
-33
400
-60
600~ <1,200
-60
1,200~ <1,800
-60
1,800~ <3,000
-65
3,000~ <6,000
3,000
-65
65
6,000
-73
GSM850/ EGSM
Output RF Spectrum
(due to switching
transient)
Max. dBm
400
-19
600
-21
21
1,200
-21
1,800
-24
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2. PERFORMANCE
2. SYSTEM SPECIFICATION
Item
Description
Specification
DCS/PCS
Output RF Spectrum
(due to switching
transient)
Max. dBm
400
-22
600
-24
,
1,200
-24
1,800
-27
Spurious Emissions
GSM850, EGSM
BER (Class II) < 2.439% @-102 dBm
DCS,PCS
BER (Cl
(Class II) < 2
2.439%
439% @-100
100 dB
dBm
3 dB
10
SLR
123 dB
Frequency (Hz)
11
12
Sending Response
RLR
Max.(dB)
Min.(dB)
100
-12
200
300
-12
1,000
-6
2,000
-6
3,000
-6
3,400
-9
4,000
43 dB
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2. PERFORMANCE
2. SYSTEM SPECIFICATION
Item
Description
Specification
Frequency
Frequency(Hz)
(Hz)
13
Receiving
g Response
p
Max.(dB)
Max.(dB)
Max
(dB)
Min.(dB)
Min.(dB)
Min (dB)
100
-12
200
300
-7
500
-5
,
1,000
-5
3,000
-5
3,400
-10
4,000
STMR
> 17 dB
15
Stability Margin
> 6 dB
dB todB
ARL
(dB) (dB)
to ARL
16
Distortion
Level
Ratio
(dB)(dB)
Level
Ratio
-35
17.5
-30
22.5
-20
30.7
-10
33.3
33.7
31.7
10
25.5
17
18
System frequency
(13 MHz) tolerance
2.5 ppm
19
32.768KHz tolerance
30 ppm
20
Ringer Volume
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2. PERFORMANCE
2. SYSTEM SPECIFICATION
Item
Description
Specification
Fast Charge : Typ.
Typ 400 mA
21
Charge Current
22
Antenna Display
Power
Over -92
7 ->
>5
93 2
-93
5 -> 4
-98 2
4 -> 2
-101 2
2 -> 1
-104 2
1 -> 0
-106 2
0 -> OFF
Under -106
Battery
Bar Status
Battery
Bar Status
Percent
Percent
(%) (%)
Battery Indicator
94%
94~10%
93~10%
Decrease gradually
Battery icon color : Green Red
Empty( 0 level )
24
25
26
Sustain RTC
without battery
27
28
Battery Type
Travel Charger
10%
2%
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3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
3.1 Digital Main Processor
External
M em ory-IF
SD/ M M C
64 - bit bus
SIM
Keypad
U SB 2.0
FS
D CC
M easurem ent
IF( A/D)
D igital M icrophone
32 - b it bus
GSM
ARM1176
cache
C IF
RAM
U SIF
GSM
C ip her
ROM
FM - radio
HSL
Stereo
H eadset
IR - M emory
EPP
GPTU
Earpiece
EPN
TEAKLite
RF
SD
PLL
FEM
32 kH z
XO
8 Ohm
700 m W
M IC N1
M ic
MUX
LR TC
LPM U
VA NA
L SIM
LAU X
VM M C
Vcore
Vibrator
VU SB
M IC P2
IF
AD C
16 Ohm
100 m W
M IC P1
PA
Low Power
D CXO
LSN
2x 16 Ohm
2x 30 m W
I S / D AI
Mi sc
GM SK
LSP
Loud speaker
C ontrol
DA C
HSR
D SP
R F PM U
B ack lig ht
DC/ D C
Buck
0 . 15 5 %
470
7.5 A
5
4k 7
ZXTP 25020
V CHG
T1
( 0 V )3 .05 V 5 .1 V (6 V)
BC 847 S
VS H N T
h f e> 20 0
2
6
~2 .5V
ma x.1.5 mA
VD D C H G
1.8V
1,8V
1.0V
VM IC
VU M IC
C harge Pum p
( negative voltage for
bipolar audio out )
C SB
CS
SE NS EP
VB A T 2
10 F
min.
D C/ DC
M icSupply
generation
C harge
SE NS EN
M IC N2
135 mV
600mV
4 k3
127 k
VCHARGE 4. 5 V 20V
for example
Battery Charger
- 14 -
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
3.1.1 General
Technology:
SoC, Monolithic, 65 nm CMOS
Package:
eWLB, 8x9 x0.8 mm
0.5 mm pitch
240 balls / 6-layer PCB
3 1 2 RF Transceiver
3.1.2
Dual-band direct conversion receiver
Tri/Quad-band possible with external circuitry
Fully integrated digital controlled X0
Additional buffer for 2 external system clocks
Fully digital RF-Synthesizer incl. -Transmitter
3.1.3 Baseband
DSP:
DSP:
178 MHz TeakLite
ARM1176
ARM1176 @ 208 MHz
MCU RAM:
MCU RAM:
3.00Mbit
3.00Mbit
Memory I/F:
Memory I/F:
1 Gbit NOR flash/OneNAND flash/SDR SDRAM
1 Gbit NOR flash/OneNAND flash/SDR SDRAM
4 Gbit NAND flash/DDR SDRAM
4 Gbit NAND flash/DDR SDRAM
Modem:
Modem:
GPRS
GPRSclass
class
l 12,
12
12,(RX/TX
(RX/TXCS1-CS4)
CS1
CS1-CS4)
CS4)
EGPRS
TXTX
MCS1-MCS4)
EGPRSclass
class12,
12,(RX
(RXMCS1-MCS9,
MCS1-MCS9,
MCS1-MCS4)
Cipher
CipherUnits:
Units:
A51/2/3
A51/2/3
GEA-1/2/3
GEA-1/2/3
Security:
Security:
OMTPTR0
TR0
OMTP
SecureBoot
Boot
Secure
RSA(ROM)/SHA-1(HWaccel.)
accel.)
RSA(ROM)/SHA-1(HW
OCDS disabling
OCDS disabling
Certificate Management
Certificate Management
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3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
Speech Codec:
FR / HR / EFR / NB-AMR
Audio Codec (running
g on ARM1176):
SP-MIDI
SB-ADPCM
MP3
WB-AMR
AAC/AAC+/eAAC+
Others:
DARP (SAIC)
TTY
Customization:
E-Fuses
3.1.5 Connectivity
3xUSIF (configurable either as SPI or UART), I2C, I2S; Interfaces @ 1.8V
Direct (U)SIM 1.8/3V
USB2.0 up to 480 Mbit/s (High Speed) w/ external USB Phy over ULPI interface
f
Stereo Headset (Amplifier integrated)
3 external analog measurement PINs
Bluetooth
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3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
3.1.6 Mixed Signal
Improved audio performance
Loudspeaker Audio Class D Amplifier, 700 mW@8 mono for hands-free and ringing
Stereo Headset 2x30 mW@16 w/o coupling C
Mono Earpiece 100 mW@16
Digital microphone supported
Differential microphone inputs
3.1.7 FM Radio
Integrated FM radio
FM Stereo RDS Receiver
Sensitivity 2 V EMF
Support for US & EU bands
Stereo recording
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3. TECHNICAL BRIEF
3.1.10 Camera
3 Mpx YUV parallel interface
HW JPEG encoder (39 Mpx/sec)
39 MHz Pixel Rate
15 fps@ 3 Mpx full resolution
- 18 -
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
A mobile platform requires power supplies for different functions. These power supplies are generated in the
A mobile platform
requires power
for different
functions.
power
supplies
generated
in the
integrated
power management
Unitsupplies
(PMU). The
PMU is designed
toThese
deliver
the power
for are
a typical
standard
integrated
power
management
Unit
(PMU).
The
PMU
is
designed
to
deliver
the
power
for
a
typical
standard
phone.
phone.
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3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
Linear voltage Regulators (low dropout) LDOs
The LDOs are used to generate the supply for the different supply domains not directly supplied out of the
DC/DC converter.
The VSIM output current is high enough to drive USB SIM cards.
LCORE
Th LCORE LDO provides
The
id th
the VCORE supply
l used
d ffor mostt off th
the di
digital
it l parts
t off th
the chip
hi
LPMU
The LPMU provides VPMU sued for the PMU supply, e.g. for the startup state machine and analog parts like ADC,
sense amplifier etc.
LUSB
The LUSB LDO generates the supply for the USB transceiver (output driver and input). If no USB interface is
required, LUSB can be used as general purpose LDO.
LAUX
The LAUX generates VAUX. It is a general purpose LDO and can be used for different functions depending on the
phone application, e.g. for the display or Camera.
LMMC
The LMMC generates VMMC. It is a general purpose LDO and can be used e,g. for memory cards
LSIM
The LSIM LDO generates the VSIM supply for the SIM card and interface. It is designed to supply Standard SIM
cards.
Other LDOs
The RF module has implemented several LDOs for different RF Power domain.
The mixed signal module has some LDOs for the audio driver and microphone supply.
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3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
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3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
3.2.1 Power on and startup
PMU-main State-Machine
The main PMU state-machine is always connected to VPMU also. The power up sequence driven by the PMU
state-machine can be seen in Figure18. After enabling the reference (HPGB) and waiting for the settling time,
the battery voltage is measured and compared with the power on threshold. If the battery voltage is high
enough, the SD1 DC/DC converter and the LCORE LDO are started. A timer ensures that the supply voltage
will be stable before the DCXO is enabled. The DCXO settling time is ensured using a fixed timer. After an
overflow of this timer, the reset is released for the rest of the system. The PMU state machine remains in this
System-ON state until the system is switched into the OFF state. For example the system sleep mode is
completely configured by software( for example switching off the LDOs, switching of the DCXO etc.) and
controlled by the VCXO_enable signal. The reason for the startup is stored in the ResetSourceRead register.
Battery Measurement
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3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
The ADC and the oscillator for the ADC needs the VDD_ADC supply voltage from the LADC LDO. LADC uses
The ADC and the oscillator for the ADC needs the VDD_ADC supply voltage from the LADC LDO. LADC uses
either the charger voltage VDD_CHARGE or VDDRTC as input voltage. The input voltage is selected
either the charger voltage VDD_CHARGE or VDDRTC as input voltage. The input voltage is selected
automatically
automatically by
by aa bulk
bulk switch
switch circuit.
circuit. LADC,
LADC, the
the ADC
ADC and
and the
the oscillator are
are enabled
enabled on
on request for every battery
measurement if the charger unit is not running. This is handled by an ADC control block in one of the statemeasurement if the charger unit is not running. This is handled by an ADC control block in one of the statemachines. If the charger unit is running the ADC is controlled by the charger state-machine
machines. If the charger unit is running the ADC is controlled by the charger state-machine
BAT low
LRTC on
oscillator on
LPMU-ULPM path on
VBAT > 2.5V
VPMU o.k.
BAT OK
SYSTEM_OFF
ON key event
RTC alarm
charger delect
first_connect
Figure.3.2.1 First
First Part
Part of
of the
the State
State Machine,
Machine, Running
Running in
in Different
Different Power
Power Domains
Domains than
than the
the Second
Second Part
Part
Figure.3.3.2
Figure.3.2.2 First Part of the State Machine, Running in Dierent Power Domains than the Second Part
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3. TECHNICAL BRIEF
ON key event or
RTC alarm or
charger detect or
rst connect
VPMU prepare
release reset_pmufsm_n_o
set reset_pmufsm_n_o
switch o PMU power region
LPMU to ULPM
SM1 ready
sm1_goto_syso
release reset_pmufsm_n_o
wait for system o
wait
3. TECHNICAL BRIEF
reset_pmufsm_n_o
HPBG on
start HPBG in fast settie mode
default trim value
LPMU low power mode
wait for HPBG timer (~2ms)
System SHUTDOWN
reset_pmu_n=0
all LDOs o (not LRTC, LPMU)
HPBG o DCXO o
Check Battery
enble battery periodic
supervision
switch HPBG to active mode
go to state
PMU SM1 SYSOFF
DCXO startup
rf_sysclk_en
wait for DCXO timer (16ms)
System ON
reset_pmu_n=1
Figure 3.2.2 Second (Main) Part of the Startup State Machine in the VPMU Domain
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3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
3.2.2 Switching on due to first connect
If the battery voltage is connected the first time,
time that means the system enters the first time the SYSOFF state,
state
this is stored in a first connect flag. If the first connect flag is set, the system will start immediately and not wait
for any other system on event in the SYSOFF state.
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3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
For details on pre-charging see the charger chapter. The charger is controlled by an independent state
machine. The pre-charge signal is used to trigger the pre-charge signal is used to trigger the pre-charge
functionality. The charger state machine fully control the pre-charge, the PMU-state machine now changes to
state HPBG on state and the system starts. This state change is indicated to the charger state-machine to
enable the charger watchdog for safety
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3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
Battery
in
start up
because of
first connect
event
VBAT
LPBG
lpmu_pd
VRTC
LPM (ES1)
ULPM
LPM
LPMU
PMU_CLK
reset_pmufsm_n_o
HPBG
check battery
continue if battery voitage is ok.:
SD1
LCORE
rf_sysclk_en
reset_pmu_n
pad_isolation_n
System
OFF
System
ON
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3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
3.2.7 External Reset Handling
Watchdog reset is seen on the reset_n pad to allow the reset of external devices. Basically there are three reset
sources, first the reset signal controlled by the PMU (reset_pmu_n_o), second the reset signal controlled by the
SCU (resetout_o) and third the external reset (RESET_N). The SCU reset is triggered by SW (for example due to a
SW reset or watchdog reset). The PMU reset is controlled by the PMU state machine. The output of the reset
handling block is the reset_postscu_n_o signal. This signal controls for example the C subsystem and releases
reset for the controller. During normal start up, the PMU releases the reset_pmu_n_o signal after entering the
SYSTEM ON state. At this time the resetout_o signal is high, the RESET_N pad is not pulled low and therefore
the reset_postscu_n_o signal follows the reset_pmu_n_o signal. That means the C reset will be released and
the C starts operation. If the SW triggers an external reset via the SCU, signal resetout_o will be forced to low
for a certain time and RESET_N will be forced to low by the open drain driver. At the same time the feedback to
the SCU will be masked to not reset the baseband. The RESET_N pad is in the VDDRTC domain but the internal
pull up is connected to the VDD_VDIG1 (1.8V) domain. That allows the pad to be used as reset for external
devices running in the VDD1V8 domain. The RESET_N pad can also be used to monitor the chip internal reset
condition during startup.
The open drain driver is a weak driver, that means it can be forced to high during debug from external pushing
some current into the pad. In testmode signal reset_pmu_n_o is high, that means the chip reset is fully
controlled from external
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3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
input to system
control unit
for example C
reset
reset_postscu_n_o
lsoation
&LS
reset_pmu_n_o
reset_pmu_n_o
open drain
pad driver
VDD_VDIG1
20k
ESD
ESD
VDD_VRTC
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3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
rf_sysclk_en_pmu
VPMU
vcxo_enable
L
S
VDDCORE
rf_sysclk_en
L
S
rf_sysclk_en
rf_sysclk_en_pmu
vcxo_enable
Isolation to 1
& LS
Figure 3
3.4.2
4 2 How sysclock Enable is Routed in the PMU
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3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
3.2.11 PMU Clock
During the first startup (for example plugging in a battery) a PMU internal oscillator is used for generation of
the PMU clock (pmu_clock). The frequency is slightly above 32 kHz (typ. 50 kHz) to be out of the audio band
also for worst case devices. After first startup the software shall enable the 32 kHz crystal oscillator. It is not
possible to use the 32 kHz oscillator during first startup, because the settling time of the oscillator can be
quite long. After the 32 kHz oscillator is running and settled the software shall switch the PMU clock to the 32
kHz clock and disable the internal PMU oscillator for power saving reasons. The 32 kHz oscillator shall never
be disabled after the PMU clock has been switched. The ADC in the charger unit has its own oscillator
generating a frequency of about 10 MHz. This oscillator is running during charging and during battery
measurements triggered by the PMU. It is off otherwise.
3.2.12 System
y
Sleep
p Mode
The sleep mode is controlled by using the VCXO_enable signal. This signal is used to switch the LDOs and the
DC/DC converter SD1 in a programmable way into its low power mode (PFM). In addition DC/DC converter
SD1 can be configured to change the output voltage to a lower value for additional power saving.
VCXO_enable is also used to deactivate the HPBG and setting LDO LPMU in the ultra-low-power mode. In
addition the DCXO is switched off by the VCXO_enable
VCXO enable signal.
signal The VCXO_enable
VCXO enable signal is also used to switch
some LDOs (software configured) to sleep and/or off mode or to change the output voltages of said LDOs.
The state of the main PMU state machine is not changed due to VCXO_enable.
ZYVX[^
- 31 -
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
3.2.14 Power Down Sequence
Setting bit OFF in the GeneralControl register switches the system into OFF mode. After the turn off event, the
state-machine switches to the SHUTDOWN state. The reset_pmu_n_o signal changes to low, the I/O pads are
isolated using the padisolation_n signal, the LCORE LDO and the SD1 DC/DC converter are switched off, the
LPMU LDO is switched to ultra-low power mode, the DCXO is turned off and the bandgap buffer is disabled.
Before switching OFF the software shall have enabled the 32 kHz oscillator and has switched the PMU clock to
the 32 kHz clock to archive the target OFF current
ZZVX[^
- 32 -
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
Match
TX_HB_IN(10)
SKY77550-21
(21) RX2
VBATT (3)
VBATT (4)
VRAMP (16)
TxEN (18)
BS (12)
VSW_EN (11)
(26) ANT
LOGIC DECODER
(19) RX1
Match
Tx_LB_IN (9)
201643_001
Z[VX[^
- 33 -
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
Figure 3.3.2
3 3 2 Band SW Logic Table
C101
RF_ANT_SEL[1]
R102
RF_HB_TX
12
33p
RF_ANT_SEL[0]
L101
C102
C115
39p
C116
39p
C117
39p
19
C105
39p
20
EGSM / PCS
21
ANT_FEED
COMMON
G3
3
C109
Rx1
10
11
12
9
T x _L B_I N
V S W_ E N
BS
T x _ HB_ I N
GND6
GND5
GND4
GND3
U101
VBATT2
VBATT1
SKY77550-21
RSVD3
GND2
GND1
Rx2
GND7
23
24
25
L 104
2.2n
RSVD
1 .8 n
C 139
ANT
1 .8 n
22
SW101
TxEN
G ND1 0
G ND9
P G ND
18
GSM850 / DCS
VRAMP
L102
DNI
8
7
6
5
L103
DNI
C103
DNI
VBAT
C104
DNI
4
3
2
1
C108
33u
(10V,2012)
C106
10n
(16V,K,X7R)
C107
15p
(50V,J,NP0)
27
28
29
17
A NT
RF_TX_EN
GND8
26
16
R S V D2
R S V D1
14
13
1K
G ND1 3
G ND1 2
G ND1 1
15
R104
RF_TX_RAMP
RF_LB_TX
33p
G4
4
L138
DNI
L139
DNI
C111
DNI
0.5p
L105
L 107
6 .8 n
L106
RF_HB_RXN
1.8n
L112
L108
DNI
5.6n
FL101
1
4
2
3
5
U_P_1960/
942_5MHz
U_P_1842_5/
881_5MHz
GND1
B_P_1960/1842_5MHz_1
B_P_1960/1842_5MHz_2
B_P_942_5/881_5MHz_1
B_P_942_5/881_5MHz_2
GND2
GND3
GND4
L109
0.75p
L110
RF_HB_RXP
1.8n
6
7
10
L111
RF_LB_RXN
10n
C114
L113
DNI
0.5p
L114
10n
RF_LB_RXP
Z\VX[^
- 34 -
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
FSYS1
FSYS2
26 MHz
XO
tuning word.
word
VBAT
3.05V-5.5V
AFC = X
Cap
Array
DIGFILT
LUXO
DIG = Y
DCXO_LUXO_PREDISTORTION
The DCXO tuning characteristic should be a first order linear function of the programming word AFC. The
variable capacitance array is a first order linear function of the digital word DIG, which leads to a nonlinear curve
ppm vs. DIG (and also a nonlinear ppm vs. AFC for DIG=AFC). In order to linearize the ppm vs. AFC curve the
implementation of a predistortion is necessary.
To get the wanted linear ppm vs. AFC tuning curve some digital predistortion of the AFC word is required. This
predistortion is performed by the linearization unit for crystal oscillator (LUXO). The LUXO calculates the
corresponding DIG value according to the given AFC value.
Z]VX[^
- 35 -
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
3.5
3.5RF
RFSubsystem
Subsystemof
ofPMB8815
PMB8815(U201)
(U201)
Figure.
g
3-5-1 Block DIAGRAM of RF Subsystem
y
Z^VX[^
- 36 -
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
3.5.2 FUNCTIONAL DESCRIPTION
3.5.2.1 Receiver
The X-GOLD215 dual-band receiver is based on a Direct Conversion Receiver (DCR) architecture. Input
impedance of the LNAs is optimized to achieve a matching without (external) high quality inductors. By use of
frequency dividers (by 2/4) the LO frequency is derived from the RF frequency synthesizer.
The receive p
path is fullyy differential to suppress
pp
the on-chip
p interferences and reduce DC-offsets. The analog
g
chain of the receiver contains two LNAs (low/high band), a quadrature mixer followed by an analog baseband
filter and 14-bit continuous-time delta-sigma analog-to-digital converter. The filtered and digitized signal is fed
into the digital signal processing chain, which provides decimation, DC offset removal and programmable gain
control.
GSM
850/900
GSM
1800/1900
RX1
RX1X
DigRF
RX
RX2
RXTXDA
RXTXEN
RX2X
LNA_GAIN
DGAIN[5:0]
RXBBFG[2:0]
DCO
Z_VX[^
- 37 -
Copyright 2011
2012 LG Electronics. Inc. All right reserved.
Only for training and service purposes
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
3.5.2.2 Transmitter
The GMSK transmitter supports power class 4 for GSM850 or GSM900 as well as power class 1 for DCS1800 or
PCS1900. The digital transmitter architecture is based on a fractional-N sigma-delta synthesizer for constant
envelope GMSK modulation. This configuration allows a very low power design without any external
components.
Up- and down-ramping is performed via the ramping DAC connected to VRAMP.
RF synthesizer
The RF subsystem contains a fractional-N sigma-delta synthesizer for the frequency synthesis. Respective to
the chosen band of operation the phase locked loop (PLL) operates at twice or forth of the target signal
frequency. In receive operation mode the divided output signal of the digital controlled oscillator output (DCO)
serves as local oscillator signal for the balanced mixer. For transmit operation the fractional-N sigma-delta
synthesizer
h i is
i used
d as modulation
d l i lloop to process the
h phase/frequency
h /f
signal.
i
l Th
The 26 MH
MHz reference
f
signal
i
l off
the phase detector incorporated in the PLL is provided by the reference oscillator.
Z`VX[^
- 38 -
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
3.5.2.3 Front-end/PA Control Interface
Two outputs (FE1, FE2) for direct control of antenna switch modules enable to select RX- and TX-mode as well
as low- and high-band operation.
An extra band select signal PABS for the power amplifier is used, to support discrete PA and switching
modules. Time accurate power dissipation of the PA is achieved by the control signal PAEN.
A minor set of power amplifiers require a bias voltage to enhance power efficiency. Support of this power
amplifiers is achieved by the implemented bias DAC.
DAC
TX2
RFIN
HB
GSM 1800/1900
RFOUT
HB
to ASM / FEM
GMSK PA
biasdac_data
to
baseband
as rf_fe4_0
BIAS
DAC
RFOUT
LB
BS
to ASM / FEM
VPAMP
GSM 850/900
VBIAS
INIT_PAFEM_A
PABIASFE 3_SEL
RFIN
LB
TX_EN
TX1
PABIAS/FE3
FE3
FE4
PAEN
PAEN
CHANNEL_BSW[1]
PABS
INIT_PAFEM_A.PABS_INV
ramping signal
PAMP
DAC
VPAMP
FE2
FE2
FE1
FE1
Fi
Figure.
3
3.5.4
5 4 PA AND FEM CONTROL BLOCK DIAGRAM
[WVX[^
- 39 -
Copyright 2011
2012 LG Electronics. Inc. All right reserved.
Only for training and service purposes
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
3.5.2.4 Power Supply
To increase power efficiency most parts of the RF subsystem are supplied by the DCDC converter situated in
the PMU subsystem. Conversion of the 1.8 V output voltage of the DCDC to the 1.3 V/1,4 V circuit supply
voltages is achieved by several Low-DropOut regulators (LDO).
One embedded direct-to-battery LDO provides the 2.5 V supply voltage for the remaining circuits.
[XVX[^
- 40 -
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
Figure.
i
3.6.1 MEMORY
O BLOCK
OC DIAGRAM
Hynix NAND Flash is a 128Mx16bit with spare 4Mx16 bit capacity.
The device is offered in 1.8 Vcc Power Supply, and with x16 I/O interface.
Its NAND cell provides the most cost-effective solution for the solid state mass storage market.
The memory is divided into blocks that can be erased independently so it is possible to preserve valid data while
old data is erased.
erased
The device contains 2048 blocks, composed by 64 pages.
Memory array is split into 2 planes, each of them consisting of 1024 blocks.
Like all other 2KB - page NAND Flash devices, a program operation allows to write the 2112-byte page in typical
250us and an erase operation can be performed in typical 3.5ms on a 128K-byte block.
In addition to this, thanks to multi-plane architecture, it is possible to program 2 pages at a time (one per each
plane) or to erase 2 blocks at a time (again, one per each plane). As a consequence, multi-plane architecture allows
program time to be reduced by 40% and erase time to be reduction by 50%. In case of multi-plane operation, there
is small degradation at 1.8V application in terms of program/erase time..
-[YVX[^
41 -
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
[ NAND Flash ]
MULTIPLANE ARCHITECTURE
SUPPLY VOLTAGE
- Vcc = 1.7 - 1.95 V
MEMORY CELL ARRAY
- (1K + 32) Words x 64 pages x 2048 blocks
PAGE SIZE
- (1K+ 32 spare) Words
BLOCK SIZE
- (64K + 2K spare) Words
PAGE READ / PROGRAM
- Random access : 25us (max.)
- Sequential access : 45ns (min.)
- Page program time : 250us (typ.)
- Multi-page program time (2 pages): 250us (Typ.)
BLOCK ERASE / MULTIPLE BLOCK ERASE
- Block erase time: 3.5 ms (Typ)
- Multi-block erase time (2 blocks): 3.5ms (Typ.)
SEQURITY
- OTP area
- Sreial number (unique ID)
- Hardware program/erase disabled during
- power transition
ADDITIONAL FEATURE
- Multiplane Architecture:
Array is split into two independent planes.
Parallel operations on both planes are available, having program and erase time.
- Single and multiplane copy back program with auto matic EDC (error detection code)
- Single and multiplane page re-program
- Single and multiplane cache program
- Cache read
- Multiplane block erase
RELIABILITY
- 100,000 Program / Erase cycles (with 1bit /528Byte ECC)
- 10 Year Data retention
ONFI 1.0 COMFLIANT COMMAND SET ELECTRICAL SIGNATURE
- Munufacture ID: ADh
- Device ID
[ZVX[^
- 42 -
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
[ DDR SDRAM ]
Double Data Rate architecture
- two data transfer per clock cycle
x16 bus width
Supply Voltage
- VDD / VDDQ = 1.7 - 1.95 V
Memory Cell Array
- 16Mb x 4Bank x 16 I/O
Bidirectional data strobe (DQS)
Input data mask signal (DQM)
Input Clock
- Differential Clock Inputs (CK, /CK)
MRS, EMRS
- JEDEC Standard guaranteed
CAS Latency
- Programmable CAS latency 2 or 3 supported
Burst Length
- Programmable burst length 2 / 4 / 8 with both sequential and interleave mode
[[VX[^
- 43 -
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
3.7
3.7BT
BTmodule
module
This module has an integrated radio transceiver that has been optimized for use in 2.4GHz Bluetooth
Wireless systems. It has been designed to provide low-power, robust communications for applications
Operating in the globally available 2.4GHz unlicensed ISM band. It is fully compliant with the Bluetooth
Radio Specification and enhanced data rate specification and meets or exceed the requirement to
provide the highest communication link quality of service.
[\VX[^
- 44 -
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
3.7.1 Transmitter path
This module features a fully integrated zero IF transmitter. The baseband transmitted data
Is digitally modulated in the modem block and up-converted the 2.4GHz ISM band in the
Transmitter path. The transmitter path consists of signal filtering, I/Q up-conversion, high
-output power amplifier(PA), and RF filtering. It also incorporates modulation schemes
P/4-DQPSK for 2 Mbps and 8-DPSK for 3 Mbps to support enhanced data rate.
Digital modulator
The digital modulator performs the data modulation and filtering required for the GFSK,
/4DQPSK, and 8-DPSK signal. The fully digital modulator minimizes any frequency drift
Or anomalies in the modulation characteristics of the transmitted signal and is much more
Stable than direct VCO modulation schemes.
Power Amplifier
The integrated PA for the BCM2070 is configurable for Class 2 operation, transmitting up to
+4 dBm as well as Class 1 operation and transmit power up to +12 dBm at the chip, gFSK,
>2.5V supply. Due to the linear nature of the PA, combined with some integrated filtering, no
External filters are requires for meeting Bluetooth and regulatory harmonic and spurious
requirements.
q
For integrated
g
mobile handset applications,
pp
, where Bluetooth is integrated
g
next
to the celluar radio, minimal external filtering can be applied to achieve near thermal noise
levels for spurious and radiated noise emissions.
Using a highly linearized, temperature compensated design the PA can transmit +12 dBm for
Basic rate and +10 dBm for enhanced data rates(2 to 3 Mbps). A flexible supply voltage range
Allows the PA to operate from 1.2V to 3.0V. The minimum supply voltage at VDDTF is 1.8V
to achieve +10dBm of transmit power.
[]VX[^
- 45 -
3. TECHNICAL BRIEF
C5
VA308
C315
C316
33p
VA309
C317
33p
C1
33p
I/O2
VPP1
RST2
RST1
GND1
VCC1
C321
0.1u
S301
5000-12P-2_95D-A1-R0
EAG63211701
VPP2
VCC2
GND2
2V85_VSIM
4 .7 K
16
G ND6
CLK2
CLK1
13
Z D 302
C2
I/O1
G ND4
C6
SIM_RST_N
G ND5
15
C3
G ND3
C7
SIM_CLK
SIM_DATA_2
SIM_RST_2
C3_1
C7_1
C2_1
C6_1
C1_1
C5_1
C320
14
SIM_DATA_1
SIM_CLK
R 317
2V85_VSIM
4 .7 K
R 318
2V85_VSIM
VA310
33p
C319
0.1u
VA311
C323
33p
C318
VA312
33p
2V85_VSIM
1B 1
SIM_RST_2
4
5
1A
S1
2B1
U302
2A
1B0
S2
10
SIM_DATA_2
SIM_DATA
SIM_SEL
9
8
100K
EUSY0186504
FSA2259UMX
SIM_DATA_1
DNI
R 327
R325
2B 0
10K
G ND
2V85_VSIM
3
R323
SIM_RST_SEL
1u
VCC
C322
R324
100K
Signal
Description
SIM_RST_N
SIM_CLK
SIM_DATA_1
- 46 -
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
3.9
3.9 LCD
LCDInterface
Interface
R 601
VDD_IO_1V8
VPA_2V85
TP603
LCD_F_DATA[0]
LCD_F_DATA[1]
LCD_F_DATA[2]
LCD_F_DATA[3]
LCD_F_DATA[4]
LCD_F_DATA[5]
LCD_F_DATA[6]
LCD_F_DATA[7]
C606
1u
C607
18p
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
R604
C622
100K
1u
TP602
LCD_PWM
LCD_ID
LCD_LED_CA1
LCD_LED_CA2
LCD_LED_CA3
LCD_LED_CA4
LCD_LED_CA5
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
R603
DNI
R 606
CN601
0
R 605
VBAT
R602
DNI
C603
2.2u
LCD_IFMODE
LCD_F_RS
LCD_F_CS_N
LCD_RST_N
LCD_F_RD
LCD_F_WR_N
LCD_VSYNC_OUT
1u
VA601
ENBY0036001
GB042-40S-H10-E3000
The LM320DN1A module is a Color Active Matrix Liquid Crystal Display with an Light Emission
Diode(LED) Back Light system. The matrix employs a-Si Thin Film Transistor as the active element.
It is a transmissive type display operating in the normally Black mode. This TFT-LCD has a 3.19 inch
diagonally measured active display area with 240 * RGB * 320 resolution. Each pixel is divided into
R,G,B dots which are arranged in vertical stripes. Gray scale or the brightness of the dots
Color is determined with a 6 bit gray scale signal for each dot, thus, presenting a palette of
More than 262,144 colors.
[_VX[^
- 47 -
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
VBAT
C601
C602
1u
1u
1u
C609
1u
C608
1u
C619
C610
1u
2.2u
C 2N
PG ND
LED4
LDO2
LED5
LDO1
LED6
SDA
C611
LDO3
23
LCD_LED_CA1
LCD_LED_CA2
LCD_LED_CA3
LCD_LED_CA4
LCD_LED_CA5
BACKLIGHT_KEY
22
21
20
19
18
SCL
R609
LED3
24
17
12
LED2
U601
LDO4
16
11
5
10
LED1
LDOIN
15
R608
C 1P
C 2P
R619
VIN
PWM
1u
VOUT
CF
8
R620
AGND
EN
VCAM_DIG_1V8
VCAM_ANA_2V8
VTOUCH_3V0
VPROX_3V0
14
F B 601
10
C 1N
2.2u
13
VCAM_IO_1V8
C604
C605
I2C_SCL
I2C_SDA
LCD_BL_CTRL
LCD_PWM
R611
100K
[`VX[^
- 48 -
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
LED Backlight Current
RT9396 communicates with a host (master) Using the standard I2C 2-wire interface.
The two bus lines of SCL and SDA must be pulled high when the bus is not in use
use. Internal
pull-up resistors are installed. After the START condition, the I2C master sends a chip
address. This address is eight bits long, consisting of seven address bits and a following data
direction bit (R/W). The RT9396 address is 10101000 (A8h) and is a receive-only (slave)
device. The second word selects the register to which the data will be written. The third word
contains data to write to the selected register. Figure 2 shows the writing information for the
four LDOs as well as for each LED current. In the second word, the sub-address of the four
LDOs is 001 and the sub-address of the LED Driver for different dimming modes are
respectively 010, 011 and 100. For the LDO output voltage setting, bits B1 to B4
represent each LDO channel respectively where a 1 indicates selected and a 0 means not
selected. The B0 bit controls on/off (1/0) mode for the selected LDO channel(s). Then, in the
third word, bite C0 to C3 control a 16-step setting of LDO1 to LDO4.The voltage values are
listed in Table 1. For LED dimming, there are three operating modes (Backlight I, Backlight
II and Backlight III) to select from by writing respectively 010, 011 and 100 into the
First three bits of the second word, It should be noticed that no matter which mode is
selected, LED1 to LED3 must be turned on, else LED4 to LED6 can not be Turned on. When
Backlight I is selected, all six LEDs have the same behavior. Their 64-step dimming
currents are set by bits C0 to C5, which are listed in Table 2. The bits C6 and C7 determine
the fade in/out time of each step as shown in Figure 2. For Backlight II and Backlight III,
two sets of LEDs, called Main and Sub, can work separately.
The quiescent current required to operate all four backlights is reduced by 1.5mA when backlight current is
set to 4.0mA or less. This feature results in higher efficiency under light-load conditions. Further reduction in
quiescent current will result from using fewer than four LEDs.
\WVX[^
- 49 -
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
VDD_IO_1V8
VUSB_CHG_IN
R401
47K
A5
A4
UART_RX
UART_TX
B1
C1
A1
DD+
U1
U2
ID
U401
LP8727-B
RES
EAN62339701
AUD1
AUD2
DSS
MIC
EXPDET
B4
B3
B2
SCL
S DA
I NT
VDD_IO_1V8
DN
DP
R402
10K
CAP
E3
E2
MUIC_IO_M
MUIC_IO_P
E1
D1
C412
C418
1u
DNI
MUIC_ACC_ID
FB401
2.2K
1800
R410
D3
B5
VUSB_LDO_4V9
D2
C 413
A2
A3
10
1u
10
C 414
R405
R406
E4
E5
1u
USB_DM
USB_DP
VBUS1
VBUS2
G ND1
G ND2
G ND3
G ND4
C411
1u
BATT1
BATT2
C2
C3
C4
D4
C5
D5
I2C_SCL
I2C_SDA
MUIC_INT_N
The LP8727 is designed to provide automatic multiplexing switches between Micro/Min USB connector and USB,
UART, and Audio paths in cellular phone applications, and it also contains a single-input Li-ion battery charger
and over-voltage protected LDO. Programming is handled via ans I2C compatible Serial Interface allowing
control of charger, multiplexing switches, and reading status information of the device.
The multiplexing switches on USB and UART support High-Speed USB and Audio inputs can be driven to
negative voltage rail. The LP8727 is compatible with USB charging specification rev 1.1 form USB IF.
The Li-ion charger requires few external components and integrates the Power FET. Charging is thermally
regulated to obtain the most efficient charging rate for a given ambient temperature. It has Over-Voltage
Protection (OVP) circuit at the charger input protects the PMU from input voltage up to +28V, eliminating the
need for and external protection circuitry.
An Over-voltage
g p
protected LDO which can supply
pp y up
p to 50mA is designed
g
for p
powering
g up
p low voltage
g USB
transceiver or waking up a PMU(Power Management Unit)when an external power source(either USB VBUS or
wall adapter) is connected to the USB connector.
\XVX[^
- 50 -
3. TECHNICAL BRIEF
1. TECHNICAL BRIEF
\[VX[^
Figure 3.12.1 Audio Section Overview
- 51 -
3. TECHNICAL BRIEF
digital
filters
ASMD
DACI
comb
Cintrd
and sidus
ADC
regsiars
RX buffers
DSP interrupt
unit
DACr
RX
Buffer
TX LNA
Shared
memory
DSP bus
output
sale ction
DSP
DSP bus
gain
control
3. TECHNICAL BRIEF
TX
Buffer
FPI bus
The audio front-end of X-GOLD215 has the following major operation modes:
Power-down: All analog parts are in power down and all clocks of the digital part are switched off.
Audio mode: Digital decimation/interpolation filters are connected to the interface buffers and the analog
part is enabled.
These major modes can be modified by certain control register settings.
Due to the new gain settings in the TX path, the maximum input voltage is limited to 0.8 Vpp.
In both voiceband paths, the value range for voice samples is confined to 97.5%, i.e. to [-31948, 31947] or
[8334H, 7CCBH] in X-GOLD215.
On the TX path, 83% "1"s on the VTPDM line correspond to a 16-bit value of 7CCBH and 17% "1"s correspond
to a 16-bit value of 8334H at the digital filter output. Thus the usable range is 66%. This range can be scaled to
100% byy Firmware.
The high-pass functions of the voiceband filters have to be implemented in firmware on TEAKLite.
\\VX[^
- 52 -
3. TECHNICAL BRIEF
- 53 -
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
Digital-to-analog converters
The multi-bit oversampling DACs of the X-GOLD215 audio front-end convert the 16-bit data words coming
from the digital interpolation filters to analogue signals.
Output Amplifier
The different output buffers in X-GOLD215 are driven by the outputs of the selection block. The differential
earpiece driver can be used to drive a 16 earpiece and works in differential. The two single ended headset
drivers can be used to drive a 16 headset. They can work unipolar mode, where an AC coupling of the headset
might be needed, or can work also in bipolor mode. The differential loudspeaker driver can be used to drive a 8
loudspeaker. As it is a class-D amplifier the needed suppression of the higher harmonics of the switching signals
has to be achieved by the external circuitry. The buffers are designed to be short circuit protected.
\^VX[^
- 54 -
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
- 55 \_VX[^
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
Microphone Supply
X GOLD2 h
X-GOLD215
has a single
i l ended
d d power-supply
l concept for
f electret
l
microphones:
i
h
For both modes a minimal load capacitance of t.b.d. nF is necessary to guarantee stable operation of the buffer.
The maximal load capacitance must not exceed t.b.d. nF.
2 microphone supplies VMIC and VUMIC are available. The supply VUMIC has a ultra-low-power mode, where
the current consumption is minimum, whilst at the same time the noise performance is reduced.
For this purpose the VUMIC is directly supplied out of the VMIC regulator, the Mic-Buffer can be switched off and
only the quiescent current of the VMIC regulator is present. This mode can be used to supply a headset and
allow accessory detection with highly reduced current consumption For normal operation the supply can be
switched to normal operation mode with improved noise performance. In case of an digital microphone VMIC
can be used for supplying this microphone.
VMIC
10k
1k5
MICP
MICN
TBV_Typical_Microphone_Supply_Generation_alternative
\`VX[^
- 56 -
3. TECHNICAL BRIEF
- 57 -
3. TECHNICAL BRIEF
- 58 -
3. TECHNICAL BRIEF
CN602
1
24
23
22
21
20
19
18
17
CAM_F_DATA[7]
I2C_SCL
CAM_F_DATA[6]
I2C_SDA
CAM_F_DATA[5]
CAM_F_DATA[4]
F_CAM_VSYNC
F_CAM_HSYNC
CAM_F_DATA[3]
CAM_MCLK
CAM_F_DATA[2]
CAM_F_DATA[1]
16
10
15
11
14
CAM_F_DATA[0]
VCAM_ANA_2V8
R616
VCAM_IO_1V8
10
V A 608
V A 607
0 .1 u
C 614
V A 6 0 6 DNI
0 .1 u
13
0 .1 u
12
CAM_PWDN
C 613
7.5p
V A 605
C620
7.5p
VCAM_DIG_1V8
V A 604
C617
CAM_RST_N
C 612
CAM_PCLK
- 59 -
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
3.13
Touch Interface
3.14 Touch Interface
The touch controller is an analog interface circuit for a human interface touch screen device.
The touch controller is an analog interface circuit for a human interface touch screen device.
All of touch functions are composed of a register-based architecture and are controlled through
the internal register sets by serial interface.
the internal register sets by serial interface.
All of touch functions are composed of a register-based architecture and are controlled through
MMS-100 Core
WIC
OSC
8-KB SRAM
32-bit KB Flash
AMBA bus
AMBA bus
LDO
Transmitter Controller
Timer
Receiver Controller
12C
Slave
ISP
C/P
HV
Swutch
HV
Swutch
HV
Swutch
Analog
Frontend
Analog
Frontend
Analog
Frontend
TX0
TX1
TX31
RX0
RX1
RX19
POR
Max 32 TX
SCL
SDA
RSTB
2 chip
interface
INTB
MSD
SMD
MSC
Max 20 RX
Figure 3-14
3 14 Touch Driver Block Diagram
Figure 3-13Touch Driver Block Diagram
MMS-100 Series are composed of a 32-bit ARM processor, a wakeup interrupt controller (WIC),
a 32-Kbytes flash memory, an 8-Kbytes SRAM, a Receiver Controller with max 20 receiver
channels(RX), a Transmitter Controller with max 32 transmitter channel(TX), an embedded I2C
MMS-100
of alines,
32-bitaARM
processor,
a wakeup
interrupt an
controller
(WIC),
a 32-Kbytes
flash C/P
slave Series
with are
fourcomposed
serial I/O
timer,
an internal
oscillator,
internal
LDO,
an internal
for HV,
and a POR.
memory,
an 8-Kbytes
SRAM, a Receiver Controller with max 20 receiver channels(RX), a Transmitter Controller with max
32 transmitter channel(TX), an embedded I2C slave with four serial I/O lines, a timer, an internal oscillator, an internal
A transmitter
i
controller
ll and
d a receiver
i
controller
ll activate
i
corresponding
di TX channels
h
l and
d RX
LDO,channels
an internal
C/P for HV, and a POR.
sequentially.
A transmitter controller and a receiver controller activate corresponding TX channels and RX channels sequentially.
A LDO generates a regulated power supply voltage from noisy voltage source. The generated
voltage is used for the power supply voltage of analog circuits. PSRR is highly improved by the
power supply voltage of analog circuits. PSRR is highly improved by the internal LDO.
internal LDO.
A LDO generates a regulated power supply voltage from noisy voltage source. The generated voltage is used for the
A charge pump generates a high voltage source for driving TX channels. The overdriven voltage increases the signal
A charge
pump
generates
strength,
thereby
improving
SNR.
]XVX[^
- 60 -
3. TECHNICAL BRIEF
- 61 -
4. TROUBLE SHOOTING
4. TROUBLE SHOOTING
4.1 RF Component
4. TROUBLE SHOOTING
4.1 RF Component
U301
U201
U201
U301
X201
X201
U101 U101
SW101
Figure
i
4.1
U301
U201
U101
X201
SW101
RF Switch
MS-156C
- 62 -
]]VX[^
4. TROUBLE SHOOTING
4.2 RX Trouble
START
(1) Check
Crystal Circuit
(2) Check
Mobile SW &TX module
Re-download or
Do calibration again
- 63 -
4. TROUBLE SHOOTING
4. TROUBLE SHOOTING
26 MHzO.K?
TP1_1 pin:
26MHz
26 MHzO.K?
Figure 4.2.1
Crystal
y
is OK.
See next page to check PLL
Circuit
X201
TP1
Crystal is OK.
No
See next page to check PLL
Replace X201
ircuit
Yes
TP1_1 pin :
26MHz
SPI_INT
Figure 4.2.1
26MHz
X201
TSX-3225
GND2
HOT2
HOT1
GND1
3
2
UART_TX
UART_RX
BT_UART_RX
BT_UART_TX
USB_DP
USB_DM
TP1
Replace X201
Yes
X201
2V85_VSIM
No
C225
0.1u
SIM_DATA
SIM_CLK
SIM_RST_N
MSD_CMD
MSD_D[0]
MSD_CLK
J10
A4
B5
A5
B4
K13
K14
B13
A13
USIF2_CTS_N
USIF1_TXD_MTSR
USIF1_RXD_MRST
USIF1_RTS_N
USIF1_CTS_N
DPLUS
DMINUS
XOX
XO
M10
E2
D1
D2
VSIM
SIM_IO
SIM_CLK
SIM_RST
F1
F3
F2
G5
MMCI_CMD
MMCI_DAT_0
MMCI_CLK
EINT2
CC1CC6IO
VDDP_ULPI
RF
VDDP_SIM
VDDP_MMC
Figure 4.2.2
Figure 4.2.2
TP1
Figure 4.2.3
- 64 -
]_VX[^
U101
TP4
SW101
4. TROUBLE SHOOTING
Figure 4.2.4
TP2
RF_ANT_SEL[1]
RF_ANT_SEL[0]
RF_TX_RAMP
RF_TX_EN
RF_TX_EN
RF_TX_RAMP
EGSM Rx
RF_ANT_SEL[1]
RF_ANT_SEL[0]
U101
TP4
hu{ zlsX
hu{zlsX
TP4
{lu
TP2
TP1
hu{zlsW
TP1
TP3
SW101
Figure 4.2.4
RF_ANT_SEL[1]
]`VX[^
C101
RF_TX_RAMP
RF_ANT_SEL[1]
RF_ANT_SEL[0]
R102
RF_HB_TX
12
33p
L101
C102
RF_TX_EN
C116
39p
C117
39p
19
C105
39p
20
EGSM / PCS
21
ANT_FEED
COMMON
G3
3
C109
10
9
T x _L B_I N
11
V S W_ E N
BS
T x _ HB_ I N
GND6
GND5
GND4
GND3
U101
VBATT2
VBATT1
SKY77550-21
RSVD3
GND2
GND1
Rx2
GND7
23
24
25
L 104
2.2n
Rx1
1 .8 n
C 139
ANT
1 .8 n
22
SW101
RSVD
L102
DNI
8
7
6
5
L103
DNI
C103
DNI
VBAT
C104
DNI
4
3
2
1
C108
33u
(10V,2012)
C106
10n
(16V,K,X7R)
C107
15p
(50V,J,NP0)
G4
4
L138
DNI
L139
DNI
C111
DNI
0.5p
L105
TP1
L 107
6 .8 n
TP2
TP3
L106
RF_HB_RXN
1.8n
L112
L108
DNI
5.6n
FL101
1
4
2
3
5
U_P_1960/
942_5MHz
U_P_1842_5/
881_5MHz
GND1
B_P_1960/1842_5MHz_1
B_P_1960/1842_5MHz_2
B_P_942_5/881_5MHz_1
B_P_942_5/881_5MHz_2
GND2
GND3
GND4
L109
0.75p
L110
- 65 -
RF_HB_RXP
1.8n
6
7
10
L111
RF_LB_RXN
10n
C114
L113
DNI
0.5p
L114
TP4
27
28
29
18
GSM850 / DCS
C115
39p
TxEN
G ND1 0
G ND9
P G ND
17
VRAMP
A NT
RF_TX_EN
GND8
26
16
R S V D2
R S V D1
14
13
1K
G ND1 3
G ND1 2
G ND1 1
15
R104
RF_TX_RAMP
12
33p
RF_ANT_SEL[0]
RF_LB_TX
10n
RF_LB_RXP
4. TROUBLE SHOOTING
4. TROUBLE SHOOTING
No
No
Yes
Check TP4 of U101 ?
Yes ?
Check TP4 of U101
Control Signal is Yes
(RF_ANT_SEL[0],
RF_ANT_SEL[1],RF_TX_EN)OK ?
Control Signal is
(GpCtrl1 GpCtrl0
(GpCtrl1,GpCtrl0,
Yes
Tx Enable)OK ?
Yes
TP2(High
Band),
TP3(Low Band)
TP2(High
SignalBand),
is OK ?
TP3(Low Band)
Signal is OK ?Yes
No
No
No
No
Check PMB8815(U201)
Check PMB8815(U201)
Yes
Mobile SW & TX Module is OK.
Mobile SW & TX Module is OK.
EGSM Rx
^WVX[^
- 66 -
4. TROUBLE SHOOTING
Figure 4.1
- 67 -
4. TROUBLE SHOOTING
VDDRF2
PIN_B16
VBAT_RF2
PIN_G15
PIN_G16
VDDXO
75
TP7
C208
1u
C209
18p
TP5
C210
220n
C218
C219
1u
470n
VDDTDC
PIN_E13
FB201
VDDMS
PIN_B14
TP8
TP9
PIN_H15
C212
47n
VDD_IO1
VDD_IO2
VDD_IO_1V8
VDD_IO_1V8
VDD_EBU
VRF1
PIN_H12
Seperate and shield
TP10
C211
4.7n
DBB SUPPLIES
VDD_IO_1V8
TP6
C213
47n
VDD_IO_1V8
VDDTRX
R 201
PIN G11
PIN K9
PIN F6,P6
C215
1u
C216
0.1u
C217
0.1u
C214
1u
(10V)
ABB SUPPLIES
VBATSP
Speaker Supply
VDD1V8CP
PMU SUPPLIES
VBAT_PMU
VBAT
VDD_IO_1V8
VPMU
PIN N10
PIN P16
C201
0.1u
C202
2.2u
VPA_2V85
PIN P12
TP2
C203
0.1u
VMMC_2V85
PIN P10
TP4
C204
470n
VUSB
VCORE
PIN L9
PIN M11
PIN K10
C205
470n
C206
0.1u
C207
220n
TP1
TP3
(10V)
VBACKUP_BAT
VDD_IO_1V8
L201
C220
1u
3.3u
VDD_IO_1V8
VPMU
22u
C221
VDD_IO_1V8
VCORE
VCORE
VDD_IO_1V8
R203
3.9K
RF_TX_RAMP
VDD_IO_1V8
VBAT
R202
470
VDD_IO_1V8
VDDMS
VDDXO
VBAT_RF2
VDDTDC
VPA_2V85
VBAT
VMMC_2V85 VUSB
VDDRF2
Q201
R204
VRF1
100K (1%)
VDD_IO_1V8
VBAT
M9
R8
T7
K8
CS
CSB
V CHG
V S H NT
L8
M8
T6
S E NS E N
S E NS E P
V DDC H G
G1 5
H1 2
F 17
C1 7
L 12
V RF 1
V SS_L O
V SSRF
V RT C
V DDR F 2
L9
M1 1
V USB
V MMC
G1 6
E14
P10
F 14
V BAT
V S S DC O
V AUX
V SSXO
B1 4
E13
H1 5
R1 8
V DDNE G
V DDT DC
V DDX O
V D D MS
J 12
A15
G1 4
V DD1 V 8 1
V R A MP
V S S _ DI G
K10
G1 0
P16
P17
F16
F 15
V C OR E
V DDC OR E
V DD1 V 8 C P
V SSL SR
V SST RX
V SSRX
P12
T11
A3
F10
H1 1
J 11
R7
V P MU
V S S _ P MU
V S S C OR E 1
V S S C OR E 2
V S S C OR E 3
V S S C OR E 4
V S S C OR E 5
F6
P6
H8
V DD_ E B U 1
V DD_ E B U 2
V DD_ DL L
G1 1
K9
V DDI O1
V DDI O2
P9
V DD_ S D1
T8
T9
R9
L 16
L 13
P18
N1 0
10u
S D1 _ F B
V S S _ S D1
S D1 S W
V S S MS 1
V S S MS 2
V BAT SP
V B A T _ P MU
C222
VUSB_LDO_4V9
R205
5.6K
A_D0
A_D1
A_D2
R5
N5
N3
NANDD_DDRA[00]
NANDD_DDRA[01]
NANDD_DDRA[02]
- 68 -
4. TROUBLE SHOOTING
START
No
Yes
No
Yes
Check the voltage of
The LDO outputs at U201
No
Replace U201
VCORE(TP03)=1.2V,
Yes
VPMU(TP02)=1.2V,
VDDMS(TP10)=1.3V,
VPA(TP04)=2.85V,
VMMC_2V85(TP01)=2.85V,
VDDRF2(TP05)=2.5V
VDDXO(TP09)=1.3V,
VDDTDC(TP08)=1.3V,
VRF1(TP06)=1.8V
No
Yes
Does it work properly?
No
The phone will
Properly operating.
- 69 -
4. TROUBLE SHOOTING
CN401 #1 pin(Connected
to TP1)
#1 Pin
Figure 4.5
VBAT
VDD_IO_1V8
TP1
R401
47K
A5
A4
B1
C1
A1
DD+
U1
U2
ID
U401
LP8727-B
RES
EAN62339701
AUD1
AUD2
DSS
MIC
EXPDET
B4
B3
B2
SCL
S DA
I NT
VDD_IO_1V8
DN
DP
R402
10K
CAP
E3
E2
MUIC_IO_M
MUIC_IO_P
E1
D1
C412
C418
1u
DNI
MUIC_ACC_ID
FB401
2.2K
1800
R410
D3
B5
VUSB_LDO_4V9
D2
C 413
A2
A3
1u
10
C 414
10
E4
E5
1u
UART_RX
UART_TX
R405
R406
VBUS1
VBUS2
G ND1
G ND2
G ND3
G ND4
USB_DM
USB_DP
BATT1
BATT2
C2
C3
C4
D4
C5
D5
C411
1u
VUSB_CHG_IN
I2C_SCL
I2C_SDA
MUIC_INT_N
- 70 -
4. TROUBLE SHOOTING
START
Yes
Battery is charged?
No
Is I/O Connector(CN401)
well-soldered ?
No
Yes
No
Yes
Battery is charged?
No
Yes
Charging is
properly operating
- 71 -
4. TROUBLE SHOOTING
Figure 4.6
- 72 -
4. TROUBLE SHOOTING
V I B _P
1
C237
22p
X202
R T C _3 2 K
K P _ OU T 1
K P _ OU T 2
K P _ OU T 3
E IN T 5
K P _ OU T 5 C C 1 C C 4 I O
T10
VI B
R1 0
A6
L18
V SS_V I B
C L K OU T 0
F 32K
L17
L15
B6
OS C 3 2 K
RE SE T _N
T2I N
D1 0
A10
B1 0
C1 0
B7
A7
R1 1
I 2 S 1 _ CL K 0 E IN T 0
I 2 S1 _RX
I 2S1_T X
I 2 S 1 _ WA 0
I 2 C_SCL
E IN T 6
I 2 C _ S DA
E IN T 1
ONOF F
C1 1
E11
F12
NX3215SA
32.768KHz
C238
27p
R E S E T _N
M S D _D E T _N
L 401
V D D _R T C
E IN T 0
VB401
R408
VIB_P
V D D P _D I G 1
VDDP_DIG1
B T _U A R T _R T S
B T _P C M _I N
B T _P C M _O U T
B T _U A R T _C T S
E IN T 4
Main
Chip
(U201)
56n
C A M _R S T _N
K E Y _ O U T [2 ]
L C D _ID
SP I _CS
10
2
C404
33p
C405 TP1
1u
L402
56n
- 73 -
4. TROUBLE SHOOTING
SETTING : Enter the engineering mode, and set vibrator on at vibration of BB test menu
START
No
Yes
No
Replace U201
Yes
No
Yes
Replace vibrator
Yes
Vibrator
Working well !
- 74 -
4. TROUBLE SHOOTING
TP7
TP4
TP6
LCD_F_DATA[7]
LCD_F_DATA[6]
LCD_F_DATA[5]
LCD_F_DATA[4]
TP1
TP2
TP3
TP5
LCD_VSYNC_OUT(4th PIN)
LCD_F_WR_N(5th PIN)
LCD_F_CS_N(8th PIN)
LCD_F_RS(9th PIN)
LCD_F_DATA[3]
LCD_F_DATA[2]
LCD_F_DATA[1]
LCD_F_DATA[0]
Figure 4.7
- 75 -
4. TROUBLE SHOOTING
FL601
2
3
4
INOUT_A1
INOUT_B1
INOUT_A2
INOUT_B2
INOUT_A3
INOUT_B3
INOUT_A4
INOUT_B4
C606
1u
C607
18p
R604
15pF
C622
LCD_PWM
LCD_ID
TP1
TP2 TP3
TP4
TP5
LCD_LED_CA1
LCD_LED_CA2
LCD_LED_CA3
LCD_LED_CA4
LCD_LED_CA5
FL602
C603
LCD_D[03]
LCD_D[02]
LCD_D[01]
LCD_D[00]
2.2u
3
4
INOUT_A1
INOUT_B1
INOUT_A2
INOUT_B2
INOUT_A3
INOUT_B3
INOUT_A4
INOUT_B4
G1
LCD_IFMODE
LCD_F_RS
LCD_F_CS_N
LCD_RST_N
LCD_F_RD
LCD_F_WR_N
LCD_VSYNC_OUT
LCD_F_DATA[3]
LCD_F_DATA[2]
LCD_F_DATA[1]
LCD_F_DATA[0]
8
7
6
G2
TP602
1u
R 606
100K
TP603
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
R603
DNI
10
LCD_F_DATA[0]
LCD_F_DATA[1]
LCD_F_DATA[2]
LCD_F_DATA[3]
LCD_F_DATA[4]
LCD_F_DATA[5]
LCD_F_DATA[6]
LCD_F_DATA[7]
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
R 605
VBAT
R602
DNI
CN601
LCD_F_RD
LCD_F_WR_N
LCD_F_CS_N
LCD_F_RS
10
G1
VPA_2V85
G2
LCD_RD
LCD_WR_N
LCD_CS_N
LCD_RS
R 601
VDD_IO_1V8
15pF
1u
VA601
TP6
FL603
8
7
INOUT_A1
INOUT_B2
INOUT_A2
INOUT_B3
INOUT_A3
INOUT_B4
INOUT_A4
10
G2
INOUT_B1
LCD_F_DATA[4]
LCD_F_DATA[5]
LCD_F_DATA[6]
LCD_F_DATA[7]
2
3
4
LCD_D[04]
LCD_D[05]
LCD_D[06]
LCD_D[07]
G1
ENBY0036001
GB042-40S-H10-E3000
15pF
VBAT
C601
C602
1u
1u
12
C611
1u
C609
1u
C608
1u
C619
C610
1u
2.2u
C 2N
PG ND
LED3
LDO3
LED4
LDO2
LED5
LDO1
LED6
23
LCD_LED_CA1
LCD_LED_CA2
LCD_LED_CA3
LCD_LED_CA4
LCD_LED_CA5
BACKLIGHT_KEY
22
21
20
19
18
TP7
17
R609
LDO4
SDA
11
24
SCL
10
U601
16
R608
LED2
CF
R619
C 1P
5
9
LED1
LDOIN
15
R620
VIN
EN
VOUT
13
VCAM_DIG_1V8
VCAM_ANA_2V8
VTOUCH_3V0
VPROX_3V0
1u
AGND
PWM
F B 601
10
C 1N
C 2P
2.2u
14
VCAM_IO_1V8
C604
C605
I2C_SCL
I2C_SDA
LCD_BL_CTRL
LCD_PWM
R611
100K
- 76 -
4. TROUBLE SHOOTING
4. TROUBLE SHOOTING
LCD_BL_CTRL
LCD_RS
LCD_CS
LCD WR
LCD_WR
_\VX[^
- 77 -
4. TROUBLE SHOOTING
START
Is the connection of
CN601 with LCD connector ok ?
No
Reassemble LCD connector
Yes
No
Yes
No
No
Yes
- 78 -
4. TROUBLE SHOOTING
TP1 :C609
TP3 :C619
TP7 :R211
TP2 :C608
TP8 :R212
Figure 4.8
- 79 -
4. TROUBLE SHOOTING
CN602
1
24
23
22
21
20
19
18
17
16
10
15
11
14
12
13
CAM_F_DATA[7]
I2C_SCL
CAM_F_DATA[6]
I2C_SDA
CAM_F_DATA[5]
CAM_F_DATA[4]
F_CAM_VSYNC
F_CAM_HSYNC
CAM_F_DATA[3]
CAM_MCLK
CAM_F_DATA[2]
CAM_F_DATA[1]
CAM_F_DATA[0]
R616
VCAM_ANA_2V8
TP6
VCAM_IO_1V8
10
V A 608
V A 607
V A 6 0 6 DNI
0 .1 u
C 614
0 .1 u
0 .1 u
VCAM_DIG_1V8
CAM_PWDN
C 612
7.5p
V A 605
C620
7.5p
V A 604
C617
CAM_RST_N
C 613
CAM_PCLK
TP4
TP5
VBAT
C601
C602
1u
1u
C609
C611
C608
1u
1u
1u
C619
TP2 C610
1u
2.2u
PG ND
LED3
LDO3
LED4
LDO2
LED5
LDO1
LED6
23
LCD_LED_CA1
LCD_LED_CA2
LCD_LED_CA3
LCD_LED_CA4
LCD_LED_CA5
BACKLIGHT_KEY
22
21
20
19
18
SCL
12
LDO4
24
17
11
LED2
U601
16
C 1P
R608
R609
LDOIN
CF
R619
10
LED1
13
VCAM_DIG_1V8
VCAM_ANA_2V8
VTOUCH_3V0
VPROX_3V0
VOUT
VIN
SDA
R620
1u
AGND
15
C 2N
C 2P
7
PWM
EN
F B 601
10
TP1
C 1N
2.2u
C604
C605
14
TP3
VCAM_IO_1V8
I2C_SCL
I2C_SDA
LCD_BL_CTRL
LCD_PWM
R611
100K
V D D P _D I G 1
V DDF S
MICN1
MICP1
MICN2
MICP2
VMIC
VUMIC
R14
T14
R15
T15
P14
P15
ACD
AGND
VREF
R12
P13
T12
MAIN_MIC_N
MAIN_MIC_P
HS_MIC_N
HS_MIC_P
HS_JACK_DET
C230
1n
VDD_IO_1V8
C231
1n
C232
C233
C235
C234
47p
47p
47p
47p
C236
220n
F 11
NC 1
NC 2
NC 3
NC 4
A1
A18
T18
T1
D1 0
A10
B1 0
C1 0
B7
A7
R1 1
I 2 S 1 _ CL K 0 E IN T 0
I 2 S1 _RX
I 2S1_T X
I 2 S 1 _ WA 0
I 2 C_SCL
E IN T 6
I 2 C _ S DA
E IN T 1
ONOF F
VDDP_DIG1
B T _U A R T _R T S
B T _P C M _I N
B T _P C M _O U T
B T _U A R T _C T S
TP204
R211
2.2K
PWRON
R212
2.2K
TP7
TP8
I2C_SDA
I2C_SCL
- 80 -
4. TROUBLE SHOOTING
CAM_MCLK
CAM_MCLK(26MHz)
CAM_RESET
I2C_DATA
CAM_VSYNC
CAM_HSYNC
CAM_HSYNC
CAM_PCLK_26MHz
- 81 -
4. TROUBLE SHOOTING
START
No
Resoldering or Replace U601
Yes
No
Replace U201 or Change the board
Yes
No
Yes
No
Yes
- 82 -
4. TROUBLE SHOOTING
M501
TP02 :C508
TP05: L504
TP04 :C515
TP03 :C510
CN501
Speaker
contact
TP06 : L505
U201 BB chip
VDDP_EBU
RAS_n
CAS_n
BC0_n
BC1_n
BC2_n
BC3_n
SDCLKO
BFCLKO_0
BFCLKO_1
CKE
ANAMON
P2
P5
L2
J3
L4
G1
J5
T2
J4
P4
P11
FSYS_EN
K17
BB
Chip
VDDP_DIG1
ABB
EPN
EPP
HSL
HSR
LSN
LSP
DDR_RAS_N
DDR_CAS_N
DDR_DQM[0]
DDR_DQM[1]
DDR_DQS[0]
DDR_DQS[1]
DDR_CLK_P
DDR_CLK_N
DDR_CKE
VMIC_BIAS_P
VAUD_HS_BIAS
DNI
DNI
C226
C227
47p
47p
C228
C229
BT_CLK_REQ
M17
M18
R16
T16
N18
N17
RCV_HS_N
RCV_HS_P
SPK_HS_L
SPK_HS_R
39p
C528
L504
SPK_P
TP5
CN501
1
DNI
C530
L505
SPK_N
C537
TP6
EAB62429501
D501
D502
39p
- 83 -
4. TROUBLE SHOOTING
R 502
VBAT
VDD_IO_1V8
C503
10u
B3
C510
0.1u
A4
C515
0.1u
B4
B2
TP4
C2
OUT+
IN3+
OUT-
IN1+
HPL
M501
IN1-
HPR
IN2+
IN2-
CP
SDA
CN
FB504
E3
E4
600
SPK_P
SPK_N
FB505
600
B1
HS_OUT_L
A1
HS_OUT_R
D1
C513
39p
C516
2.2u
E1
C514
39p
SCL
G ND
C508
1u
IN3-
D3
C507
A3
CPVSS
TP3
C3
A2
I2C_SDA
I2C_SCL
C4
12
C1
RCV_HS_N
12
1u
B IA S
SPK_HS_R
RCV_HS_P
R509
CPVDD
SPK_HS_L
R508
E2
TP2 TP1
HPVDD
D2
D4
C505
SPVDD
2.2u
C504
0.1u
2.2u
2.2u
R 513
HS_GND
START
< Cal l >
START
< Mp3>
No
Replace/Change
Receiver Speaker
No
Yes
Yes
No
No
Change the U201
Yes
Yes
No
No
Replace/Change the M501
Yes
- 84 -
4. TROUBLE SHOOTING
M501
C229 : TP09
U201 BB chip
C228 : TP08
C525 : TP12
FB506 : TP5
FB502 : TP2
C521 : TP11
FB507 : TP3
R512 : TP10
FB503 : TP4
FB501 : TP1
C515 : TP7
C510 : TP6
- 85 -
4. TROUBLE SHOOTING
VDDP_EBU
RAS_n
CAS_n
BC0_n
BC1_n
BC2_n
BC3_n
SDCLKO
BFCLKO_0
BFCLKO_1
CKE
ANAMON
P2
P5
L2
J3
L4
G1
J5
T2
J4
P4
P11
FSYS_EN
K17
U201
BB
Chip
VDDP_DIG1
EPN
EPP
HSL
HSR
LSN
LSP
ABB
DDR_RAS_N
DDR_CAS_N
DDR_DQM[0]
DDR_DQM[1]
DDR_DQS[0]
DDR_DQS[1]
DDR_CLK_P
VMIC_BIAS_P
DDR_CLK_N
DDR_CKE
VAUD_HS_BIAS
DNI
DNI
C226
C227
TP8: C228
47p
47p
C228
C229
BT_CLK_REQ
M17
M18
R16
T16
N18
N17
RCV_HS_N
RCV_HS_P
SPK_HS_L
SPK_HS_R
1u
A3
C508
1u
B3
C510
0.1u
A4
C515
0.1u
B4
B2
I2C_SDA
I2C_SCL
C2
IN3-
OUT+
IN3+
OUT-
IN1+
HPL
M501
IN1-
HPR
IN2+
IN2-
CP
SDA
CN
600
FB504
E3
E4
SPK_P
SPK_N
FB505
600
B1
HS_OUT_L
A1
HS_OUT_R
D1
C513
39p
C516
2.2u
E1
C514
39p
SCL
E2
A2
B IA S
TP7:C515
G ND
C507
SPVDD
C3
CPVSS
RCV_HS_N
C4
12
D3
RCV_HS_P
12
R509
C1
SPK_HS_L
SPK_HS_R
R508
CPVDD
TP6: C510
HPVDD
D2
D4
TP9: C229
2.2u
2.2u
VDD_IO_1V8
R501
47K
R523
C501
DNI
HS_GND
TP2:FB502
VA501
Q501
R503
220K
R505
R504
10
DNI
FB501
10
TP1:FB501
KTJ6131V
L501
100n
C502
27p
1n
FM_LNA_IN
FB502
1800
FB507
1800
R506
HS_OUT_R
4.7
TP3:FB507
M6
M1
M4D
HS_JACK_DET
1800
FB503
R507
M4
HS_OUT_L
4.7
M5
J501
FB506
JAM3333-F36-7H
EAG63234901
1800
HS_MIC
TP4:FB503
C509
C506
560p
560p
HS_GND
ZD501
C540
39pF
ZD502
ZD503
ZD504
TP5:FB506
TP10:R512
VAUD_HS_BIAS
TP11:C521
R511
1.5K
C520
R512
HS_MIC
2.2K
HS_MIC_N
22n
C521
39pF
C522
VDD_IO_1V8
C523
C524
2.2u
C525
47p
47p
22n
HS_MIC_P
VIN-
VIN+
1K
3
TP12:C525
U502
NCS2200SQ2T2G
VCC
GND
OUT
2
R527
HS_HOOK_DET
47
C541
220K
R 526
120p
R 528
R524
100K
1M
R 525
HS_GND
- 86 -
4. TROUBLE SHOOTING
START
No
Can you
hear the sound from
The earphone?
Resolder J501
Yes
No
Change the
earphone
and try again
No
Resolder
FB501(TP01), FB502(TP02),
FB507(TP03), FB503(TP04),
FB506(TP05) C510(TP06)
C515(TP07)
Yes
Yes
Set the audio part of the test
Equipment to echo mode
No
Change the
earphone
and try again
No
Resolder
C228(TP08), C229(TP09),
R512(TP10) C521(TP11),
C525(TP12) Or change the
M501(amp),U201(BB IC)
Yes
Earphone will work properly
- 87 -
4. TROUBLE SHOOTING
C235 : TP3
C230 : TP1
C529 : TP6
C532 : TP5
Figure 4.12
V D D P _D I G 1
M17
M18
R16
T16
N18
N17
MICN1
MICP1
MICN2
MICP2
VMIC
VUMIC
R14
T14
R15
T15
P14
P15
ACD
AGND
VREF
R12
P13
T12
DDR_CLK_N
DDR_CKE
VAUD_HS_BIAS
DNI
DNI
C226
C227
47p
47p
C228
C229
R 514
1K
2 .2 K
C527
39p
MIC501
C529
MAIN_MIC_P
33n
100
R517
C531
39pF
BT_CLK_REQ
RCV_HS_N
RCV_HS_P
SPK_HS_L
SPK_HS_R
TP3
HS_JACK_DET
R 515
C526
10u
TP6
MAIN_MIC_N
MAIN_MIC_P
HS_MIC_N
HS_MIC_P
C532
MAIN_MIC_N
33n
SUMY0003816
OBM-410L44-RC1882
100
R518
TP5
C535
C536
39p
39p
VA502
2 .2 K
EPN
EPP
HSL
HSR
LSN
LSP
F 11
NC 1
NC 2
NC 3
NC 4
A1
A18
T18
T1
I 2 C_SCL
I 2 C _ S DA
ONOF F
B7
A7
R1 1
V DDF S
U201
E IN T 6
E IN T 1
ABB
K17
TP2
NAND_ALE_N
NAND_RE_N
NAND_DDR_WE_N
NAND_CLE_N
DDR_RAS_N
DDR_CAS_N
DDR_DQM[0]
DDR_DQM[1]
DDR_DQS[0]
DDR_DQS[1]
DDR_CLK_P
VMIC_BIAS_P
R 519
FSYS_EN
VDDP_DIG1
VMIC_BIAS_P
NAND_WP_N
NAND_BSY_N
NAND_CS_N
DDR_CS_N
VDDP_EBU
A2
B1
N2
R2
R6
T4
P1
T5
J8
P2
P5
L2
J3
L4
G1
J5
T2
J4
P4
P11
R 520
FWP
FCDP_RBn
CS0_n
CS1_n
CS2_n
ADV_n
RD_n
WR_n
WAIT_n
RAS_n
CAS_n
BC0_n
BC1_n
BC2_n
BC3_n
SDCLKO
BFCLKO_0
BFCLKO_1
CKE
ANAMON
VDDP_DIG1
VA503
TP1
C230
1n
VDD_IO_1V8
C236
220n
C231
1n
C232
C233
C235
C234
47p
47p
47p
47p
TP4
TP204
PWRON
R211
2.2K
R212
2.2K
- 88 -
4. TROUBLE SHOOTING
SETTING : After initialize Agilent 8960, Test EGSM900, DCS mode ( or GSM850, PCS mode )
START
No
Yes
Check the signal
Level at each side
of MIC501.
Is it a few tens
mV AC?
No
Yes
No
Re-solder component
Yes
Microphone will work
properly.
- 89 -
4. TROUBLE SHOOTING
TP1 : C225
PIN#1
Figure 4.13
TP1
R213
2V85_VSIM
SIM_DATA
SIM_CLK
SIM_RST_N
C225
0.1u
B13
A13
XOX
XO
M10
E2
D1
D2
VSIM
SIM_IO
SIM_CLK
SIM_RST
F1
F3
F2
G5
G4
E1
MSD_CMD
MSD_D[0]
MSD_CLK
MSD_D[1]
MSD_D[2]
MSD_D[3]
H14
J17
J18
G18
H18
H17
K18
J15
LCD_RST_N
JTAG_TDO
JTAG_TDI
JTAG_TMS
JTAG_TCK
JTAG_TRST_N
SIM_SEL
2V85_VSIM
MMCI_CMD
MMCI_DAT_0
MMCI_CLK
MMCI_DAT_1
MMCI_DAT_2
MMCI_DAT_3
RF
VDDP_SIM
VDDP_MMC
U201
SWIF_TXRX
TDO
TDI
TMS
TCK
TRST_N
TRIG_IN
MON1
VDDP_DIG1
2V85_VSIM
2V85_VSIM
Z D 302
C2
C315
33p
C5
VA308
C316
33p
VA309
C317
33p
C1
C321
0.1u
R 317
16
G ND6
CLK2
CLK1
I/O2
VPP1
RST2
RST1
GND1
VCC1
S301
5000-12P-2_95D-A1-R0
EAG63211701
- 90 -
G ND4
C6
SIM_RST_N
I/O1
G ND3
C3
13
C7
14
SIM_DATA_1
SIM_CLK
G ND5
15
4 .7 K
R 318
PIN #1
VPP2
VCC2
GND2
2V85_VSIM
4 .7 K
USB_DM
Connect GND plane directly
SIM_CLK
SIM_DATA_2
SIM_RST_2
C3_1
C7_1
C2_1
C6_1
C1_1
C5_1
C320
33p
VA310
C319
0.1u
VA311
C323
33p
C318
VA312
33p
4. TROUBLE SHOOTING
START
No
Yes
No
Voltage output
of VSIM LDO (TP1)
Is 2.85V?
No
Change the U102
Yes
Resolder S301
No
Yes
No
redownload SW.
Does it work
Properly?
Yes
- 91 -
4. TROUBLE SHOOTING
C310(TP1)
VA313(TP3)
Figure 4.14
VMMC_2V85
R 326
Micro_SD
TP2
VDD_IO_1V8
10K
10K
R 306
10K
R 305
R 304
10K
R 303
10K
R 302
R301
470K
CN301
SW1 13
R307
MSD_DET_N
11
470
MSD_D[2]
MSD_D[3]
MSD_CMD
R308
51
R309
51
R310
51
MSD_CLK
R311
51
MSD_D[0]
MSD_D[1]
R312
51
R313
51
DNI
C311
V A 306
V A 305
12
V A 304
Z D 301
V A 302
V A 301
V A 313
10
R 314
TP3
TP1
14
SW2
C310
1u
DNI
- 92 -
4. TROUBLE SHOOTING
START
Micro SD Detect
OK?
No
Check the
C310(TP1) = 2.8V?
No
Change U201
Yes
Yes
uSD_DET(R301(TP2))
Is High?
No
Re-attach or
Replace CN301
Yes
No
Check out MC_CLK &
Data Timing(TP3) OK?
Re-download SW
Yes
- 93 -
4. TROUBLE SHOOTING
C708(TP04)
C709(TP03)
C711(TP01)
U701
VDD_IO_1V8
C713(TP02)
Figure 4.16.1
VDD_IO_1V8
Class 2 or 1.5
QCT
VBT_IO_1V8
VPA_2V85
When power class 1.5 is used, R307 is populated and R308 is depopulated.
(Vice versa for power class 2)
VDD_IO_1V8
VREG_MSME_1V8
FB701
VIO_1V8
C702
10n
VREG_MSMP_2V6
C706
10n
VPA_2V85
C707
10n
C704
10p
C703
10p
C701
C705
2.2u
VDD_IO_1V8
A6
B1
B7
A5
BT_WIFI
A7
2.2u
A3
F1
IFX
D3
QCT
VBT_PA_2V6
600
F7
E7
IFX
R703
12n
C708
2.7n
1
2
IN
GND1
C709
OUT
GND2
3
4
DNI
C7
100p
E1
D1
R704
BT_RF
C710
DNI
C711: TP1
C708:TP4
C709:TP3
1n
B4
F5
E5
1n
C713
DNI
1K
C1
E2
C711
RTC_32K
C712
BT_CLK_26M
R705
BT_WAKEUP
BTCX_STATUS
BTCX_RF_ACTIVE
BTCX_TXCONF
BT_WAKEUP_HOST
BT_CLK_REQ
TP710
C3
D5
B3
F4
RFP
TM2
SPIM_CLK
SPIM_CS_N
XIN
XOUT
VREG HV
RST_N
REG_EN
SCL
SDA
LPO_IN
V D D _U S B
V DDTF
RES
VDDPX
VDDRF
D6
2450MHz
VREG
VDDO
C714
3.3n
15K
VDDC1
VDDC2
R703
CON_ANT_FEED
V BAT
R702
U701
BCM2070B2KUBXG
GPIO_0
GPIO_6
GPIO_1
GPIO_5
PCM_IN
PCM_OUT
PCM_CLK
PCM_SYNC
UART_TXD
UART_RXD
UART_RTS_N
UART_CTS_N
HUSB_DN
HUSB_DP
C5
B5
TP701
BT_RST_N
C6
D4
E4
C4
A4
C2
D2
F2
E3
TP702
TP703
TP704
TP705
TP706
TP708
TP709
TP707
BT_PCM_OUT
BT_PCM_IN
BT_PCM_CLK
BT_PCM_SYNC
BT_UART_RX
BT_UART_TX
BT_UART_CTS
BT_UART_RTS
B2
A2
TP711
F6
F3
E6
D7
B6
A1
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
C713: TP2
- 94 -
4. TROUBLE SHOOTING
START
Check of BT Ant condition
No
A condition is good?
Replace Ant701
Yes
Check condition of matching
components TP3~4(C708,C709)
No
A condition is good?
Yes
No
Replace
U701
Yes
Check RTC32K
TP1 (C711)
No
Replace
U701
Yes
Check BT_CLK_26M
TP2(C713)
No
Replace
U701
Yes
BT will work properly
- 95 -
4. TROUBLE SHOOTING
X801
VDD_IO_1V8
C818 : TP3
C821 : TP6
C819 : TP4
U802
RTC_32K
R803(TP5)
ANT701
C708(TP1)
C703(TP2)
U801
- 96 -
4. TROUBLE SHOOTING
VBAT
V O U T _L N L D O
V D D _3 P 3
V O U T _L N L D O
V O U T _C B U C K
V D D _3 P 3
V O U T _L N L D O
V D D _C O R E
VDD_3P3
10p
C 802
C801
V O U T _C B U C K
R F _S W _C T R L _R X
U801
VDD_IO_1V8
FB801
120
C826
C 810
C 811
2.2u
2.2u
L3
L4
D1
D3
1 .5 u
C 812
4 .7 u
L 802
3 .9 n
C 814
C806
C807
C808
1u
0.1u
220n
TP802
TP803
TP805
TP806
TP808
F5
L6
L5
L7
K6
K7
G6
G5
H6
H7
G7
A3
B4
WR F _ A N A _ V D D 1 P 2
WR F _ L N A _ V D D 1 P 2
A5
F7
WR F _ A F E _ V D D 1 P 2
WR F _ V C O _ L D O _ I N _ V D D 1 P 8
H1
G1
V DDI O_ R F
V DD_ L DO
V OU T _ C L DO
WR F _ P A _ V D D
WR F _ P A D R V _ V D D
VDD1
VDD2
VDDIO_SD
EXT_SMPS_REQ
EXT_PWM_REQ
SDIO_DATA_2
SDIO_DATA_0/SPI_MISO
SDIO_DATA_1/SPI_IRQ
SDIO_CLK/SPI_CLK
SDIO_DATA_3/SPI_CSX
SDIO_CMD/SPI_MOSI
U802
GPIO_0
B7
FB802
C7
H4
600
VOUT_LNLDO
H2
H3
VDD_CORE
0.1u
C816
220n
C819
VDD_IO_1V8
K5
VDD_IO_1V8
J3
K4
E4
R802
0
WL_RST_N
GPIO_3/BTCX_TXCONF
GPIO_4/BTCX_STATUS
GPIO_5/BTCX_RF_ACTIVE
GPIO_1/BTCX_FREQ
JTAG_TMS
JTAG_TDO
JTAG_TDI
JTAG_TCK
JTAG_TRST_L
D4
A6
B2
D2
C6
E2
E6
A4
WR F _ G P I O _ O U T
WR F _ V C O _ L D O _ O U T _ V D D 1 P 2
SPI_MISO
SPI_INT
SPI_CLK
SPI_CS
SPI_MOSI
WRF_XTAL_VDD1P2
VDDIO
RF_SW_CTRL0
RF_SW_CTRL1
RF_SW_CTRL2
RF_SW_CTRL3
SR_P V SS
TP801
WR F _ A N A _ G N D
WR F _ V C O _ G N D
WR F _ P A _ G N D 1
WR F _ P A _ G N D 2
WR F _ X T A L _ G N D
WR F _ P A D R V _ G N D
WR F _ A F E _ G N D
WR F _ L N A _ G N D
WR F _ T X
TP3
E1
F1
G2
F2
RF_SW_CTRL_BT
RF_SW_CTRL_RX
RF_SW_CTRL_TX
P MU _ A V S S
0.5p
WRF_RES_EXT
K2
C820
10p
D5
15K
WRF_TCXO_VDD3P3
WRF_TCXO_IN
XTAL_PU
OSCOUT
OSCIN
EXT_SLEEP_CLK
J4
H5
J6
J7
E5
WLAN_REG_ON
TP804
TP807
TP809
BTCX_TXCONF
BTCX_STATUS
BTCX_RF_ACTIVE
TP06 : XTALP
TP810
A7
F6
D6
D7
J5
WLAN_CLK_REQ
C821
100p
XTALP
R803
0
RTC_32K
C4
C5
R801
C818
L2
3.3n
18p
WRF_RFIN
WRF_RFOUT
G ND1
G ND2
G ND3
G ND4
G ND5
WRF_TX
DNI
A1
B1
L804
E3
F3
F4
G3
G4
C817
L803
RF_SW_CTRL_TX
1u
18p
V OU T _ 3 P 3
9
8
J1
K1
J2
L1
GND1
S R _ V DDB A T 1 _ 1
S R _ V DDB A T 1 _ 2
S R _ V DDB A T 2
SR_V L X
RX
VCTL3
10u
C 809
10
11
12
TX1
VDD
V C T L2
GND2
U801
ANT XM2400LV-DL1201TMP
EAT61493201
TX2
C815
5.6n
VCTL1
NC1
NC2
39K
15p
R805
C813
BT_WIFI
C805
K3
0.1u
RF_SW_CTRL_BT
L 801
4 .7 u
BT_RF
V OU T _ L NL DO1
C803
10p
C822
220n
TP05 : RTC_32K
X801
TCXO LDO
WiFi TCXO
VBAT
VDD_TCXO
VDD_TCXO
100K
C823
R804
VIN
STBY
VOUT
GND
X801
1
2
2.2u
C824
1u
26MHz
VCC
OUT
3
TG-5010LH-87N
XTALP
4
3
WLAN_CLK_REQ
PG ND
U803
GND
NC
2
1
C825
1u
- 97 -
4. TROUBLE SHOOTING
START
Check of Wifi Ant condition
No
A condition is good?
Replace Ant701
Yes
Check condition of
matching components
C708,C703(TP1,TP2)
No
A condition is good?
Yes
No
Replace
U802
Yes
No
Check RTC32K
(R806:TP5)
Replace
U802
Yes
No
Check XTAL
(C821:TP6)
Replace
X801
Yes
Wifi will
work properly
- 98 -
4. TROUBLE SHOOTING
VA501 : TP3
C502 : TP1
L501 : TP2
L202 : TP4
ZD201 : TP6
C242 : TP5
Q202
Figure 4.17
C501
FM_LNA_IN
1n
C502:TP1
C502
27p
L501
100n
VA501:TP3
VA501
R505
HS_GND
DNI
FB501
10
L501:TP2
FB502
M6
FB507
M1
J 501
M4D
FB503
M4
M5
J501
FB506
JAM3333-F36-7H
EAG63234901
FM Radio(LNA)
L202
FM_LNA_EN
22n
C242 : TP05
C241
1u
R216
5.1
L202 : TP04
ZD201 : TP06
R214
24K
C239
FM_LNA_IN
Q202
C242
470n
FM_LNA_OUT
Q202
To Main Chipset!
Z D 201
DNI
330p
R215
270
R217
4.7K
- 99 -
C240
470n
4. TROUBLE SHOOTING
START
Check of ear jack condition
No
A condition is good?
Replace J501
Yes
Check condition of matching
components(L501,C502,VA501: TP1,2,3)
A condition is good?
No
Yes
Check Bias Voltage FM LNA
(LNA_EN_L202 : TP 04)
Yes
A condition is good?
No
Replace Q202
Yes
No
Replace U201
Yes
FM_radio will
work properly
- 100 -
4. TROUBLE SHOOTING
TP1 : R412
TP3 : C212
TP2 : C211
V D D P _D I G 1
V DDF S
MICN1
MICP1
MICN2
MICP2
VMIC
VUMIC
R14
T14
R15
T15
P14
P15
ACD
AGND
VREF
R12
P13
T12
MAIN_MIC_N
MAIN_MIC_P
HS_MIC_N
HS_MIC_P
HS_JACK_DET
C230
1n
VDD_IO_1V8
C231
1n
C232
C233
C235
C234
47p
47p
47p
47p
C236
220n
F 11
NC 1
NC 2
NC 3
NC 4
A1
A18
T18
T1
D1 0
A10
B1 0
C1 0
B7
A7
R1 1
I 2 S 1 _ CL K 0 E IN T 0
I 2 S1 _RX
I 2S1_T X
I 2 S 1 _ WA 0
I 2 C_SCL
E IN T 6
I 2 C _ S DA
E IN T 1
ONOF F
VDDP_DIG1
B T _U A R T _R T S
B T _P C M _I N
B T _P C M _O U T
B T _U A R T _C T S
TP204
R211
2.2K
PWRON
TP2
TP3
R212
2.2K
I2C_SDA
I2C_SCL
TP1
4 .7 K
R 412
VDD_IO_1V8
VTOUCH_3V0
CN403
10
No9=NC(reset)
I2C_SCL
I2C_SDA
No7=NC(VDDIO)
TOUCH_INT
- 101 -
V A 4 0 6 DNI
V A 4 0 5 DNI
V A 404
TOUCH_ID
GB042-10S-H10-E3000
VA407
C416
0.1u
4. TROUBLE SHOOTING
START
No
Resolder or Replace
U201
Yes
No
Resolder or Replace
U402
Yes
No
Yes
Resolder CN404 or
replace touch panel
Yes
Touch will work
properly
- 102 -
4. TROUBLE SHOOTING
TP301
TP304
A0
A1
A2
A3
A4
J4
K1
K2
K3
B2
TP301
NANDD_DDRA[00]
NANDD_DDRA[01]
NANDD_DDRA[02]
NANDD_DDRA[03]
NANDD_DDRA[04]
TP301
TP304
/CK
CK
CKE
/CS
/RAS
/CAS
- 103 -
G8
F8
D3
H2
F2
G2
J1
TP303
TP304
DDR_CLK_N
DDR_CLK_P
DDR_CKE
DDR_CS_N
DDR_RAS_N
DDR_CAS_N
4. TROUBLE SHOOTING
START
No
Resolder or Replace
U301
Yes
No
Resolder or Replace
U301
Yes
Memory will work
properly
- 104 -
4. TROUBLE SHOOTING
Process
Detail Guide
Description
Disassemble
Main Board
Main Board
Apply heat to
shield-can that
removing part
Shield-can cut
off Main board
Remove
Memory
- 105 -
1. Disassemble
the main board
from the Phone.
2. Detach gold
gasket tape from
shield-can via
pincette.
1. Cut 4-point of
shield-can that
checked red
quadrangle via
nipper.
2. Flowing iron
through applying
heat. In same
time lift a piece
of shield can with
a pincette.
3. Separated
shield-can throw
away.
4. TROUBLE SHOOTING
Soldering
Memory and
Shield can
Ready to rework
memory
Soldering shield
can.
Attaching
gold gasket
and assemble
Assemble phone
- 106 -
Function test
1. Ready to
rework new
normal Memory.
2. Be locate
exactly position
via pincette.
3. Apply heat via
heat-gun.
4. Be careful
when using
heat-gun for not
blowing up other
parts.
5. Find out
shield-can and
soldering
1. Attach gold
gasket and
remove vinyl
through pincette.
2. Assemble
other parts that
is disassembled
before.
3. Function test
after finishing
assemble.
4. TROUBLE SHOOTING
TP1 : VA607
TP2 : VA608
TP3
TP2
VPROX_3V0
U501
1
R521
GP2AP002S00F
LEDA
SCL
LEDC
SDA
VCC
VIO
VOUT
GND
I2C_SCL
0
2
R522
I2C_SDA
VDD_IO_1V8
10
4
4 .7 u
0 .1 u
10u
C 533
C 539
C 538
PROX_INT
EUSY0376201
TP1
C534
1u
TP3
- 107 -
4. TROUBLE SHOOTING
START
LCD OFF?
No
No
Yes
Yes
Work Well?
No
END
Measurement
VREG_MSME_1.8V
VREG_PROX_2.6V
PROX_OUT
PROX_I2C_SCL / SDA
- 108 -
5. DOWNLOAD
5. DOWNLOAD
kGGaG Onzt|s{pGGZUWP
XUjGGGGaG iyhpsGO{tnP
YUGzV~G aG OGw} UGP
LG-T395
LG-T395
- 109 -
5. DOWNLOAD
kss aG
kssG
a On|Y_WUkssP
On|Y_W kssP
LG-T395
LG-T395
LG-T395
- 110 -
5. DOWNLOAD
LG-T395
LG-T395
LG-T395
- 111 -
5. DOWNLOAD
zG||ziwGtGGGaGG OW[P
LG-T395
- 112 -
5. DOWNLOAD
- 113 -
5. DOWNLOAD
- 114 -
5. DOWNLOAD
|ziGtG aGOGpumpulvuGhGzP
LG-T395
- 115 -
5. DOWNLOAD
- 116 -
5. DOWNLOAD
aGOtnzt}ZWP
O
P
- 117 -
5. DOWNLOAD
LG-T395
LG-T395
LG-T395
LG-T395
LG-T395
LG-T395
LG-T395
LG-T395
LG-T395
- 118 -
5. DOWNLOAD
LG-T395
LG-T395
LG-T395
LG-T395
LG-T395
LG-T395
- 119 -
5. DOWNLOAD
LG-T395
LG-T395
- 120 -
5. DOWNLOAD
LG-T395
LG-T395
- 121 -
6.Block Diagram
6. BLOCK DIAGRAM
38)#
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/5&A%./5&A%/&
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4(A*$A4:2
4(A*$A4:0
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4(A.$A6:
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'75;
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- 122 -
7. CIRCUIT DIAGRAM
7. CIRCUIT DIAGRAM
RF
1-0-1-2 ANT_PAD_Ver1.0
C101
RF_ANT_SEL[1]
R102
RF_HB_TX
12
33p
RF_ANT_SEL[0]
L101
C102
C115
39p
ANT103
C116
39p
C117
39p
19
C105
39p
20
EGSM / PCS
21
HJ-BCT-04Y
ANT_FEED
FEED
ANT
COMMON
G3
3
ANT102
C110
3.3n
1.2p
C112
10
9
T x _L B_I N
11
12
BS
V S W_ E N
T x _ HB_ I N
VBATT2
VBATT1
RSVD3
GND2
GND1
Rx2
GND7
23
24
25
C103
DNI
VBAT
C104
DNI
4
3
2
1
C108
33u
(10V,2012)
C106
10n
(16V,K,X7R)
C107
15p
(50V,J,NP0)
G4
L139
DNI
C111
DNI
0.5p
L105
ANT_FEED
FEED
HJ-ICT-03Y
C109
U101
SKY77550-21
8
7
6
5
L138
DNI
HJ-ICT-03Y
2.2n
L 104
SW101
Rx1
1 .8 n
C 139
R107
1 .8 n
22
ANT101
RSVD
G ND1 0
G ND9
P G ND
18
GSM850 / DCS
TxEN
GND6
GND5
GND4
GND3
L103
DNI
27
28
29
17
A NT
RF_TX_EN
VRAMP
26
16
R S V D2
R S V D1
14
13
1K
G ND1 3
G ND1 2
G ND1 1
15
R104
RF_TX_RAMP
GND8
RF_LB_TX
33p
L102
DNI
C113
27n
L 107
6 .8 n
L106
L108
DNI
5.6n
FL101
1
4
MODE
STANDBY
VSW_EN
BS
Tx Enable
LOW
LOW
LOW
RX1
HIGH
LOW
LOW
RX2
HIGH
HIGH
LOW
850/900 TX
HIGH
LOW
HIGH
DCS/PCS TX
HIGH
HIGH
HIGH
2
3
5
U_P_1960/
942_5MHz
U_P_1842_5/
881_5MHz
GND1
B_P_1960/1842_5MHz_1
B_P_1960/1842_5MHz_2
B_P_942_5/881_5MHz_1
B_P_942_5/881_5MHz_2
GND2
GND3
GND4
L109
0.75p
L110
RF_HB_RXP
1.8n
6
7
10
L111
RF_LB_RXN
10n
C114
L113
DNI
0.5p
L114
- 123 -
RF_HB_RXN
1.8n
L112
10n
RF_LB_RXP
7. CIRCUIT DIAGRAM
VDDRF2
PIN_B16
VBAT
VBAT_RF2
PIN_G15
PIN_G16
VDDXO
VDDTDC
PIN_E13
FB201
PIN_B14
C209
18p
C210
220n
C218
C219
1u
470n
C211
4.7n
PIN_H15
C212
47n
VDD_IO1
VDD_IO2
VDD_IO_1V8
VDD_IO_1V8
ABB SUPPLIES
VDD_EBU
VDD1V8CP
VRF1
PIN_H12
Seperate and shield
75
C208
1u
DBB SUPPLIES
VDD_IO_1V8
VDDMS
C213
47n
PIN G11
C214
1u
PIN K9
C215
1u
VBAT
C201
0.1u
C217
0.1u
PMU SUPPLIES
VBAT_PMU
PIN P16
PIN F6,P6
C216
0.1u
VBATSP
Speaker Supply
VDD_IO_1V8
VDD_IO_1V8
R 201
2-5-1-2_IFX_XMM215x_NAND_V0.1
VPMU
VPA_2V85
PIN N10
PIN P12
C202
2.2u
C203
0.1u
VMMC_2V85
VUSB
VCORE
PIN P10
PIN L9
PIN M11
PIN K10
C204
470n
C205
470n
C206
0.1u
C207
220n
(10V)
(10V)
VBACKUP_BAT
VDD_IO_1V8
L201
Shield Can
C220
1u
3.3u
VDD_IO_1V8
VPMU
22u
C221
VDD_IO_1V8
VCORE
VCORE
R203
3.9K
RF_TX_RAMP
VDD_IO_1V8
VBAT
R202
470
VDD_IO_1V8
VDD_IO_1V8
VDDMS
VDDXO
VBAT_RF2
VDDTDC
VPA_2V85
VBAT
VMMC_2V85 VUSB
VDDRF2
Q201
R204
VRF1
AGR+MCP
VUSB_LDO_4V9
100K (1%)
VDD_IO_1V8
VBACKUP_BAT
R 206
10u
4 .7 K
R205
5.6K
VBAT
C222
Super Cap
SC201
SC202
BT_RST_N
BT_CLK_26M
R210
100K
SPI_CLK
BT_PCM_CLK
BT_PCM_SYNC
SWIF_TXRX
TDO
TDI
TMS
TCK
TRST_N
TRIG_IN
MON1
MON2
MON3
FSYS1
FSYS2 RF
DIGUP_CLK
DIGUP1
DIGUP2
L10
K12
L11
LEDFBN
LEDFBP
LEDDRV
M9
R8
T7
K8
L8
M8
T6
CS
CSB
V CHG
V S H NT
S E NS E N
S E NS E P
V DDC H G
H1 2
F17
C1 7
L 12
V RF 1
V SS_L O
V SSRF
V RT C
M1 1
L9
G1 5
V DDR F 2
V USB
V MMC
R1 8
B1 4
E13
G1 6
E14
P10
F14
V BAT
V S S DC O
V AUX
V SSXO
V DDNE G
V DDT DC
H1 5
V D D MS
V DDX O
J 12
A15
G1 4
V DD1 V 8 1
V R A MP
V S S _ DI G
K10
G1 0
P16
P17
F16
F15
V C OR E
V DDC OR E
V DD1 V 8 C P
V SSL SR
V SST RX
V SSRX
P12
T11
A3
F10
H1 1
J 11
R7
V P MU
V S S _ P MU
V S S C OR E 1
V S S C OR E 2
V S S C OR E 3
V S S C OR E 4
V S S C OR E 5
F6
P6
H8
G1 1
K9
V DDI O1
V DDI O2
VDDP_MMC
INT PORT
EINT0
EINT4
EINT7
CC1CC6IO
CC0CC1IO
SIGNAL NAME
SLIDE
BT_DBB_INT
uSD_DET
_CHG_EOC
MUIC_INT
VDDP_DIG1
VDDP_DIG1
ABB
CC0CC1IO
CC0CC7IO
EINT4/EINT1
VDDP_DIG2
E3
D3
F4
D5
C4
C3
B3
D4
C1
F5
E5
C5
D6
E4
C2
B2
DI
DI
DI
DI
DI
DI
DI
DI
DI
DI
DI
DI
DI
DI
DI
DI
R209
100K
H14
J17
J18
G18
H18
H17
K18
J15
J14
C6
G13
F13
J13
H13
G12
PIN NAME
T2IN
DIGUP2
DIF_RESET
USIF1_CTS_N
USIF1_RTS_N
VDDP_DIG1
VDDP_DIG1
VDDP_DIG1
DNI
R5
N5
N3
M4
M1
P3
R3
R4
T3
M5
L5
N4
N6
P7
R1
M3
L1
M2
J2
L3
K3
J1
K2
K4
H6
H1
H3
G3
G2
H2
H4
G6
FWP
FCDP_RBn
CS0_n
CS1_n
CS2_n
ADV_n
RD_n
WR_n
WAIT_n
RAS_n
CAS_n
BC0_n
BC1_n
BC2_n
BC3_n
SDCLKO
BFCLKO_0
BFCLKO_1
CKE
ANAMON
A2
B1
N2
R2
R6
T4
P1
T5
J8
P2
P5
L2
J3
L4
G1
J5
T2
J4
P4
P11
FSYS_EN
K17
NANDD_DDRA[00]
NANDD_DDRA[01]
NANDD_DDRA[02]
NANDD_DDRA[03]
NANDD_DDRA[04]
NANDD_DDRA[05]
NANDD_DDRA[06]
NANDD_DDRA[07]
NANDD_DDRA[08]
NANDD_DDRA[09]
NANDD_DDRA[10]
NANDD_DDRA[11]
NANDD_DDRA[12]
NANDD_DDRA[13]
NANDD_DDRA[14]
NANDD_DDRA[15]
DDR_D[00]
DDR_D[01]
DDR_D[02]
DDR_D[03]
DDR_D[04]
DDR_D[05]
DDR_D[06]
DDR_D[07]
DDR_D[08]
DDR_D[09]
DDR_D[10]
DDR_D[11]
DDR_D[12]
DDR_D[13]
DDR_D[14]
DDR_D[15]
BAT201
SMZY0023501
311HR-VG1
FM Radio(LNA)
NAND_WP_N
NAND_BSY_N
NAND_CS_N
DDR_CS_N
L202
FM_LNA_EN
22n
NAND_ALE_N
NAND_RE_N
NAND_DDR_WE_N
NAND_CLE_N
DDR_RAS_N
DDR_CAS_N
DDR_DQM[0]
DDR_DQM[1]
DDR_DQS[0]
DDR_DQS[1]
DDR_CLK_P
VMIC_BIAS_P
DDR_CLK_N
DDR_CKE
C241
1u
R216
5.1
R214
24K
VAUD_HS_BIAS
DNI
DNI
C226
C227
47p
47p
C228
C229
R215
270
C239
FM_LNA_IN
BT_CLK_REQ
EPN
EPP
HSL
HSR
LSN
LSP
M17
M18
R16
T16
N18
N17
RCV_HS_N
RCV_HS_P
SPK_HS_L
SPK_HS_R
MICN1
MICP1
MICN2
MICP2
VMIC
VUMIC
R14
T14
R15
T15
P14
P15
MAIN_MIC_N
MAIN_MIC_P
HS_MIC_N
HS_MIC_P
ACD
AGND
VREF
R12
P13
T12
C242
3
1
470n
FM_LNA_OUT
Q202
330p
To Main Chipset!
Z D 201
DNI
SIM_SEL
VDDP_EBU
MMCI_CMD
MMCI_DAT_0
MMCI_CLK
MMCI_DAT_1
MMCI_DAT_2
MMCI_DAT_3
V DDF S
LCD_RST_N
JTAG_TDO
JTAG_TDI
JTAG_TMS
JTAG_TCK
JTAG_TRST_N
F1
F3
F2
G5
G4
E1
VDDP_SIM
V D D P _D I G 1
MSD_CMD
MSD_D[0]
MSD_CLK
MSD_D[1]
MSD_D[2]
MSD_D[3]
VSIM
SIM_IO
SIM_CLK
SIM_RST
C223
A_D0
A_D1
A_D2
A_D3
A_D4
A_D5
A_D6
A_D7
A_D8
A_D9
A_D10
A_D11
A_D12
A_D13
A_D14
A_D15
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
C240
R217
4.7K
470n
HS_JACK_DET
C230
1n
VDD_IO_1V8
C231
1n
C232
C233
C235
C234
47p
47p
47p
47p
C236
220n
F 11
SIM_DATA
SIM_CLK
SIM_RST_N
C225
0.1u
M10
E2
D1
D2
NC 1
NC 2
NC 3
NC 4
RF
A1
A18
T18
T1
R213
VDDP_ULPI
I 2 S 1 _ CL K 0 E IN T 0
I 2 S1 _RX
I 2S1_T X
I 2 S 1 _ WA 0
I 2 C_SCL
E IN T 6
I 2 C _ S DA
E IN T 1
ONOF F
2V85_VSIM
VDDP_DIG1
E IN T 0
U201
EINT2
CC1CC6IO
D1 0
A10
B1 0
C1 0
B7
A7
R1 1
UART_TX
UART_RX
BT_UART_RX
BT_UART_TX
USB_DP
USB_DM
V D D _R T C
V D D P _D I G 1
E IN T 4
GND1
OS C 3 2 K
RE SE T _N
T2I N
HOT2
HOT1
V SS_V I B
C L K OU T 0
F 32K
TSX-3225
GND2
L 17
L 15
B6
X201
VDDP_DIG1
EINT3
R1 0
A6
L 18
VDDP_EBU
VI B
USIF2_TXD_MTSR
USIF2_RXD_MRST
USIF2_RTS_N
USIF2_CTS_N
USIF1_TXD_MTSR
USIF1_RXD_MRST
USIF1_RTS_N
USIF1_CTS_N
DPLUS
DMINUS
XOX
XO
RF
T10
26MHz
H10
J9
H9
J10
A4
B5
A5
B4
K13
K14
B13
A13
ABB
K P _ I N0
E IN T 0
K P _ I N1
K P _ I N2
K P _ I N3
K P _ I N4 C C 0 C C 4 I O
K P _ I N5 C C 1 C C 0 I O
K P _ OU T 0
E IN T 1
K P _ OU T 1
K P _ OU T 2
K P _ OU T 3
E IN T 5
K P _ OU T 5 C C 1 C C 4 I O
SPI_MOSI
SPI_MISO
WLAN_REG_ON
SPI_INT
TX1
FE2
RX12
RX12X
RX34
RX34X
VDET
PABS
PABIAS
FE1
TX2
PAEN
VDDTRX
A11
A12
B1 2
C1 2
D1 2
E12
D1 1
B1 1
C1 1
E11
F 12
RF_ANT_SEL[0]
RF_HB_TX
RF_TX_EN
A17
A16
D18
C18
F18
E18
C16
B15
C15
B18
B17
C14
B16
C I F _ D0
C I F _ D1
C I F _ D2
C I F _ D3
C I F _ D4
C I F _ D5
C I F _ D6
C I F _ D7
CI F _ P CL K E IN T 6
C I F _ H S Y NC
C I F _ V S Y NC
C L K OU T 2
CI F _P D
C C 1C C 3IO
CI F _RE SE T
VDDTRX
M0
M1
M2
VDD_FMR
FMRIN
FMRINX
CP1
CP2
A8
B8
C7
A9
B9
C8
C9
E10
G8
F9
E9
F8
G9
E8
RF_LB_TX
RF_ANT_SEL[1]
RF_LB_RXP
RF_LB_RXN
RF_HB_RXP
RF_HB_RXN
N14
T13
R13
N13
M12
M13
T17
R17
V DD_ E B U 1
V DD_ E B U 2
V DD_ DL L
P9
FM_LNA_OUT
4.7n
S D1 _ F B
V S S _ S D1
S D1 S W
V S S MS 1
V S S MS 2
V BAT SP
V B A T _ P MU
V DD_ S D1
C224
F _ D0
F _ D1
F _ D2
F _ D3
F _ D4
F _ D5
F _ D6
F _ D7
F _ D8
F _CS1
F _CD
F _ WR
F _RD
F _ HD
F _V D
F _ RE S E T E IN T 7
TOUCH_ID
BAT_TEMP
T8
T9
R9
L16
L13
P18
N1 0
PAM
B T _U A R T _R T S
B T _P C M _I N
B T _P C M _O U T
B T _U A R T _C T S
R E S E T _N
M S D _D E T _N
R T C _3 2 K
V I B _P
H S _H O O K _D E T
S I M_ R S T _ S E L
P R O X _I N T
K E Y _ I N [1 ]
C A M _P W D N
K E Y _ I N [3 ]
B T _W A K E U P _H O S T
M U I C _I N T _N
T O U C H _I N T
C A M _R S T _N
K E Y _ O U T [2 ]
L C D _ID
SP I _CS
7 .5 p
I2C_SDA
I2C_SCL
VDD_IO_1V8
CN201
NX3215SA
32.768KHz
TP205
10
C 244
R212
2.2K
C237
C238
22p
27p
TP206
TP207
C 243
R 218
X202
R211
2.2K
7 .5 p
C A M _ D A T A [0 ]
C A M _ D A T A [1 ]
C A M _ D A T A [2 ]
C A M _ D A T A [3 ]
C A M _ D A T A [4 ]
C A M _ D A T A [5 ]
C A M _ D A T A [6 ]
C A M _ D A T A [7 ]
C A M _P C L K
C A M _H S Y N C
C A M _V S Y N C
L C D _ D [0 0 ]
L C D _ D [0 1 ]
L C D _ D [0 2 ]
L C D _ D [0 3 ]
L C D _ D [0 4 ]
L C D _ D [0 5 ]
L C D _ D [0 6 ]
L C D _ D [0 7 ]
F M _L N A _E N
L C D _C S _N
L C D _R S
L C D _W R _N
L C D _R D
B T _W A K E U P
L C D _V S Y N C _O U T
L C D _B L _C T R L
TP204
PWRON
JTAG_TRST_N
JTAG_TDI
JTAG_TMS
JTAG_TCK
3
4
5
6
7
JTAG_TDO
RESET_N
DNI
C A M_ MC L K
C245
- 124 -
7. CIRCUIT DIAGRAM
8-3-1-2_Push_168T_Ver1.0
VMMC_2V85
R 326
Micro_SD
MSD_DET_N
VDD_IO_1V8
MCP2-1_2G_1G DDRx16_hynix
TP303
TP304
TP305
0.1u
VSS1
VSS4
VSS8
VSSQ5
VSSQ4
VSSQ9
VSSQ8
VSSQ3
VSS2
VSS3
VSSQ10
VSSQ1
VSSQ2
VSS5
VSSQ6
VSSQ7
VSS6
VSS7
A1
A10
N1
N1 0
A9
B1
B5
B10
C9
D10
E9
F10
G9
H1
H9
J10
K10
L2
L9
M10
N6
N9
/CE
/RE
/WE
CLE
ALE
/WP
R/B
M1
M2
M3
L5
N7
L6
M6
L8
N2
N3
M4
N4
N5
M7
L7
M8
A6
A3
A7
A4
B4
B3
B6
NANDD_DDRA[00]
NANDD_DDRA[01]
NANDD_DDRA[02]
NANDD_DDRA[03]
NANDD_DDRA[04]
NANDD_DDRA[05]
NANDD_DDRA[06]
NANDD_DDRA[07]
NANDD_DDRA[08]
NANDD_DDRA[09]
NANDD_DDRA[10]
NANDD_DDRA[11]
NANDD_DDRA[12]
NANDD_DDRA[13]
NANDD_DDRA[14]
NANDD_DDRA[15]
10K
R 306
10K
R 305
10K
10K
V A 306
14
SW2
DNI
2V85_VSIM
2V85_VSIM
2V85_VSIM
SIM_DATA_1
SIM_CLK
C7
C3
C6
SIM_RST_N
VDD_IO_1V8
C2
Z D 302
0.1u
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7
IO8
IO9
IO10
IO11
IO12
IO13
IO14
IO15
CD/DAT3
T3
CMD
T4
VDD
CLK
VSS
DAT0
DAT1
T5
T6
T7
T8
12
C310
1u
C311
DAT2
T2
SIM_CONNECTOR Dual
C315
33p
C5
VA308
C316
VA309
33p
C317
C1
33p
I/O1
CLK2
CLK1
I/O2
VPP1
RST2
S301
RST1
5000-12P-2_95D-A1-R0
EAG63211701
GND1
VCC1
C321
0.1u
VPP2
VCC2
GND2
2V85_VSIM
SIM_CLK
SIM_DATA_2
SIM_RST_2
C3_1
C7_1
C2_1
C6_1
C1_1
C5_1
C320
33p
VA310
C319
0.1u
VA311
C323
33p
C318
VA312
33p
R321
10K
0.1u
VCC1
VCC2
R 304
10
10K
NAND_CS_N
NAND_RE_N
NAND_DDR_WE_N
NAND_CLE_N
NAND_ALE_N
NAND_WP_N
NAND_BSY_N
100K
C314
R 303
DDR_CLK_N
DDR_CLK_P
DDR_CKE
DDR_CS_N
DDR_RAS_N
DDR_CAS_N
NAND_DDR_WE_N
DDR_DQM[1]
DDR_DQM[0]
DDR_DQS[1]
DDR_DQS[0]
R 319
C313
10K
R 302
51
DDR_D[00]
DDR_D[01]
DDR_D[02]
DDR_D[03]
DDR_D[04]
DDR_D[05]
DDR_D[06]
DDR_D[07]
DDR_D[08]
DDR_D[09]
DDR_D[10]
DDR_D[11]
DDR_D[12]
DDR_D[13]
DDR_D[14]
DDR_D[15]
R 322
C312
NC 1
NC 2 6
NC 2 8
NC 2 9
A5
M5
VDD_IO_1V8
Description
T1
4 .7 K
G8
F8
D3
H2
F2
G2
J1
D7
H8
D5
H7
R313
R 317
/CK
CK
CKE
/CS
/RAS
/CAS
/WED
UDQM
LDQM
UDQS
LDQS
TP302
51
R 318
NANDD_DDRA[13]
NC27
NC20
NC21
NC9
NC19
NC8
NC11
NC12
NC17
NC18
NC7
NC16
NC25
NC6
NC10
NC5
NC13
NC14
NC4
NC2
NC24
NC22
NC23
A13
NC3
K4
K5
K6
K7
J8
K8
J7
J5
E6
C5
D8
C6
C8
C7
B8
B7
51
R312
16
A2
D4
D6
E3
E4
E5
E7
E8
F1
F3
F4
F5
F6
F7
G3
G4
G5
G6
G7
H4
H5
H6
J6
L3
L4
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
R311
MSD_D[0]
MSD_D[1]
G ND6
0.1u
MSD_CLK
G ND4
0.1u
14
0.1u
51
V A 305
4.7u
51
R310
15
C309
R309
G ND5
C308
G ND3
C307
51
13
C306
R308
V A 304
C305
33p
VDDQ1
VDDQ6
VDDQ5
VDDQ4
VDDQ10
VDDQ9
VDDQ2
VDDQ8
VDDQ7
VDDQ3
MSD_D[2]
MSD_D[3]
MSD_CMD
Z D 301
VDD_IO_1V8
B9
C10
D9
E10
F9
H10
J9
K9
L10
M9
Pin Number
11
9
NANDD_DDRA[00]
NANDD_DDRA[01]
NANDD_DDRA[02]
NANDD_DDRA[03]
NANDD_DDRA[04]
NANDD_DDRA[05]
NANDD_DDRA[06]
NANDD_DDRA[07]
NANDD_DDRA[08]
NANDD_DDRA[09]
NANDD_DDRA[10]
NANDD_DDRA[11]
NANDD_DDRA[12]
NANDD_DDRA[14]
NANDD_DDRA[15]
V A 302
C304
33p
TP301
V A 301
0.1u
J4
K1
K2
K3
B2
C2
D1
C3
D2
C4
J3
E2
E1
H3
J2
CN301
SW1 13
470
V A 313
C303
0.1u
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
BA0
BA1
MSD_DET_N
4 .7 K
C302
4.7u
VDD1
VDD2
VDD3
VDD5
VDD4
VDD6
Low
470K
R307
DNI
C301
A8
C1
G1
G10
L1
N8
High
Insert
R301
R 314
VDD_IO_1V8
EAN61927501
U301
H9DA2GH1GHMMMR-46M
No card
SIM Switch
SIM_RST_2
3
4
R323
1
2B1
U302
2A
1B0
S2
10
SIM_DATA_2
SIM_DATA
SIM_SEL
9
8
EUSY0186504
FSA2259UMX
SIM_DATA_1
DNI
R 327
2B 0
7
100K
- 125 -
S1
10K
R325
1A
G ND
2V85_VSIM
SIM_RST_SEL
1u
VCC
1B 1
C322
R324
100K
7. CIRCUIT DIAGRAM
VBAT
VDD_IO_1V8
MOTOR
VUSB_CHG_IN
VUSB_CHG_IN
R401
47K
B1
C1
A1
U1
U2
ID
U401
LP8727-B
RES
EAN62339701
AUD1
AUD2
DSS
MIC
EXPDET
G ND1
G ND2
G ND3
G ND4
SCL
S DA
I NT
VDD_IO_1V8
DD+
CAP
B4
B3
B2
R402
10K
E3
E2
MUIC_IO_M
MUIC_IO_P
C418
1u
DNI
FL401
ZD401
DNI
MUIC_ACC_ID
FB401
2.2K
ZD402
C402
C401
1u
E1
D1
C412
IN
10
R407
10
BAT_TEMP
VB401
R408
VIB_P
10
D2
R409
100K
VUSB_LDO_4V9
(1%)
D1
MUIC_IO_M
MUIC_IO_P
MUIC_ACC_ID
D3
R403
51K
CN402
8
1800
R410
B5
CN401
22pF
L 401
A5
A4
UART_RX
UART_TX
DN
DP
GND1
56n
A2
A3
OUT
C404
33p
C405
1u
L402
56n
D2
C 413
10
VDD_IO_1V8
VBAT
GND2
1u
10
E4
E5
C 414
R405
R406
USB_DM
USB_DP
VBUS1
VBUS2
C2
C3
C4
D4
C411
1u
BATT1
BATT2
1u
C5
D5
ZD403
11
C406
47u
C410
DNI
C407
C408
C409
C417
33p
10n
2.2u
33p
VA401
04-5161-005-101-868+
22pF
EAG63149901
I2C_SCL
I2C_SDA
MUIC_INT_N
C-Touch Connector
ESD GND
VBACKUP_BAT
VDD_IO_1V8
VTOUCH_3V0
4 .7 K
R 412
POWER ON
1
2
CN403
R413
6.8K
10
CN404
1
No9=NC(reset)
I2C_SCL
3
CN405
R417
1K
VA403
I2C_SDA
PWRON
ZD404
R418
C415
0.1u
KEY_IN[1]
KEY_OUT[2]
KEY_IN[3]
R419
R421
R420
100K
TP405
TP409
TP413
TP417
TP402
TP406
TP410
TP414
TP418
TP403
TP407
TP411
TP415
TP419
TP404
TP408
TP412
TP416
TP420
3
4
VA409
No7=NC(VDDIO)
TOUCH_INT
TP401
680
680
680
VA402
VA408
V A 4 0 6 DNI
V A 4 0 5 DNI
V A 404
TOUCH_ID
GB042-10S-H10-E3000
VA407
C416
0.1u
KEY_OUT2
- 126 -
KEY_OUT3
KEY_IN0
SEND
KEY_IN1
Vol_down
CLR
KEY_IN3
Vol_UP
END
7. CIRCUIT DIAGRAM
AUDIO SUBSYSTEM
3.5pi HEADSET
VDD_IO_1V8
VBAT
R501
47K
R523
C501
DNI
KTJ6131V
L501
100n
VA501
3
C502
27p
R 502
1n
FM_LNA_IN
Q501
R503
VDD_IO_1V8
C503
10u
D4
D2
RCV_HS_N
A3
1u
B3
C510
0.1u
A4
C515
0.1u
B4
B2
I2C_SDA
I2C_SCL
IN3-
M1
FB507
1800
M4D
E4
OUT-
IN1+
600
R506
HS_OUT_R
HPL
IN2-
CP
SDA
CN
FB506
JAM3333-F36-7H
EAG63234901
HS_MIC
C516
2.2u
C513
39p
E2
C509
C506
560p
560p
HS_GND
C514
39p
ZD501
C540
39pF
SCL
A2
1800
HS_OUT_R
D1
E1
HS_OUT_L
4.7
M5
HS_OUT_L
A1
HPR
IN2+
R507
M4
J501
B1
HS_JACK_DET
1800
FB503
SPK_P
SPK_N
FB505
600
M501
IN1-
FB504
E3
OUT+
IN3+
B IA S
C2
1800
ZD502
ZD503
ZD504
G ND
C508
SPK_HS_R
RCV_HS_P
1u
FB502
D3
C507
SPK_HS_L
HPVDD
C3
M6
CPVSS
C4
12
CPVDD
12
R509
FB501
10
4.7
C1
R508
R504
10
DNI
C504
0.1u
C505
SPVDD
2.2u
220K
R505
HS_GND
VAUD_HS_BIAS
C517 C518 C519
2.2u
2.2u
2.2u
R511
1.5K
C520
R512
HS_MIC
2.2K
HS_MIC_N
22n
C521
39pF
R 513
HS_GND
C522
VDD_IO_1V8
C523
C524
2.2u
C525
47p
47p
22n
HS_MIC_P
VIN-
U502
NCS2200SQ2T2G
VCC
1K
VIN+
R527
OUT
GND
HS_HOOK_DET
47
C541
MAIN MIC
Proximity Sensor
1K
VMIC_BIAS_P
R 514
SPEAKER
220K
R 526
120p
R 528
R524
100K
1M
R 525
HS_GND
VPROX_3V0
C527
U501
1
39p
2 .2 K
R521
39p
R 515
C526
10u
C528
R522
MIC501
D501
D502
SDA
I2C_SCL
VCC
VIO
VOUT
GND
I2C_SDA
10u
EUSY0376201
VDD_IO_1V8
C534
1u
R518
C535
C536
39p
39p
VA502
2 .2 K
C537
33n
R 519
MAIN_MIC_N
SUMY0003816
OBM-410L44-RC1882
100
SPK_N
C531
39pF
C532
0 .1 u
R517
EAB62429501
PROX_INT
C 538
100
4 .7 u
33n
C 533
MAIN_MIC_P
C529
C530
L505
C 539
DNI
SCL
LEDC
10
CN501
R 520
L504
SPK_P
GP2AP002S00F
LEDA
VA503
39p
- 127 -
7. CIRCUIT DIAGRAM
INOUT_B2
INOUT_A3
INOUT_B3
INOUT_A4
INOUT_B4
LCD_PWM
LCD_ID
7
6
LCD_F_RD
LCD_F_WR_N
LCD_F_CS_N
LCD_F_RS
VBAT
15pF
0
TP602
R 606
1u
10
G1
C622
C601
C602
1u
1u
C603
FL602
7
8
R620
LCD_D[04]
LCD_D[05]
LCD_D[06]
LCD_D[07]
7
6
INOUT_B1
INOUT_A1
INOUT_B2
INOUT_A2
INOUT_B3
INOUT_A3
INOUT_B4
INOUT_A4
10
G2
ENBY0036001
GB042-40S-H10-E3000
1
2
3
4
R619
10
R608
11
R609
12
FL603
1u
VA601
C611
LCD_F_DATA[4]
LCD_F_DATA[5]
LCD_F_DATA[6]
LCD_F_DATA[7]
1u
C609
1u
C608
1u
C619
C610
1u
2.2u
5
6
VCAM_DIG_1V8
VCAM_ANA_2V8
VTOUCH_3V0
VPROX_3V0
15pF
C604
2.2u
PG ND
VCAM_IO_1V8
AGND
1u
VOUT
VIN
LED1
LDOIN
LED2
U601
LDO4
LED3
LDO3
LED4
LDO2
LED5
LDO1
LED6
24
23
LCD_LED_CA1
LCD_LED_CA2
LCD_LED_CA3
LCD_LED_CA4
LCD_LED_CA5
BACKLIGHT_KEY
22
21
20
19
18
SCL
LCD_F_DATA[3]
LCD_F_DATA[2]
LCD_F_DATA[1]
LCD_F_DATA[0]
17
C 1P
INOUT_B4
C 2N
INOUT_A4
SDA
INOUT_B3
C 2P
INOUT_B2
INOUT_A3
C 1N
INOUT_B1
INOUT_A2
16
INOUT_A1
PWM
G1
LCD_IFMODE
LCD_F_RS
LCD_F_CS_N
LCD_RST_N
LCD_F_RD
LCD_F_WR_N
LCD_VSYNC_OUT
CF
LCD_D[03]
LCD_D[02]
LCD_D[01]
LCD_D[00]
2.2u
C605
EN
LCD_LED_CA1
LCD_LED_CA2
LCD_LED_CA3
LCD_LED_CA4
LCD_LED_CA5
G2
100K
15
18p
INOUT_B1
INOUT_A2
14
C607
INOUT_A1
13
C606
1u
10
1u
R604
I2C_SCL
I2C_SDA
G1
C621
R603
DNI
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
LCD_BL_CTRL
LCD_IFMODE
R610
100K
TP603
LCD_F_DATA[0]
LCD_F_DATA[1]
LCD_F_DATA[2]
LCD_F_DATA[3]
LCD_F_DATA[4]
LCD_F_DATA[5]
LCD_F_DATA[6]
LCD_F_DATA[7]
R602
DNI
CN601
0
R 605
VBAT
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
LCD_RD
LCD_WR_N
LCD_CS_N
LCD_RS
VPA_2V85
G2
R 601
VDD_IO_1V8
F B 601
10
LCD CONNECTOR
15pF
LCD_PWM
R611
100K
CAM_EMI FILTER
2M_FF_CAMERA
10
G1
CAM_F_DATA[7]
CAM_F_DATA[6]
CAM_F_DATA[5]
CAM_F_DATA[4]
CN602
1
2
24
23
CAM_F_DATA[7]
CAM_F_DATA[4]
22
21
20
19
18
17
16
INOUT_B3
INOUT_A2
INOUT_B2
INOUT_A1
INOUT_B1
CAM_DATA[7]
CAM_DATA[6]
CAM_DATA[5]
CAM_DATA[4]
6
7
8
9
47
R613
47
LD603
R614
47
BACKLIGHT_KEY
VA602
FL604
VCAM_ANA_2V8
R616
10
15
11
14
12
13
CAM_F_DATA[3]
CAM_F_DATA[2]
CAM_F_DATA[1]
CAM_F_DATA[0]
CAM_RST_N
3
2
1
INOUT_A4
INOUT_B4
INOUT_A3
INOUT_B3
INOUT_A2
INOUT_B2
INOUT_A1
INOUT_B1
6
7
8
9
CAM_DATA[3]
CAM_DATA[2]
CAM_DATA[1]
CAM_DATA[0]
FL605
VCAM_IO_1V8
10
G2
G1
CAM_F_DATA[1]
10
15pF
F_CAM_HSYNC
CAM_F_DATA[0]
V A 608
0 .1 u
V A 607
0 .1 u
C 614
V A 6 0 6 DNI
0 .1 u
C 613
V A 604
C 612
VCAM_DIG_1V8
CAM_PWDN
V A 605
7.5p
INOUT_B4
INOUT_A3
CAM_MCLK
CAM_F_DATA[2]
C620
INOUT_A4
R612
LD602
F_CAM_VSYNC
CAM_F_DATA[3]
7.5p
LD601
I2C_SDA
CAM_F_DATA[5]
C617
I2C_SCL
CAM_F_DATA[6]
CAM_PCLK
G2
15pF
F_CAM_VSYNC
R617
100
CAM_VSYNC
C616
7.5p
F_CAM_HSYNC
R618
100
CAM_HSYNC
C618
7.5p
- 128 -
7. CIRCUIT DIAGRAM
BT
7-1-1-3_BCM2070(QCT & IFX Only)_0.4Pitch
VDD_IO_1V8
Class 2 or 1.5
QCT
VBT_IO_1V8
VPA_2V85
When power class 1.5 is used, R307 is populated and R308 is depopulated.
(Vice versa for power class 2)
VREG_MSME_1V8
FB701
VIO_1V8
IFX
QCT
VBT_PA_2V6
600
C702
10n
VREG_MSMP_2V6
C706
10n
VPA_2V85
IFX
C707
10n
C704
10p
C703
10p
C701
C705
2.2u
2.2u
CON_ANT_FEED|GND
VDD_IO_1V8
A6
B1
B7
F7
E7
A7
A3
F1
A5
BT_WIFI
D3
ANT701
CON_ANT_FEED
CON_ANT_FEED
3.3n
12n
C708
2.7n
C709
1
2
IN
GND1
OUT
GND2
3
4
DNI
C7
100p
E1
D1
R704
BT_RF
C710
DNI
R705
BT_WAKEUP
BTCX_STATUS
BTCX_RF_ACTIVE
C1
E2
C711
RTC_32K
C712
BT_CLK_26M
1n
B4
F5
E5
1n
C713
DNI
1K
BTCX_TXCONF
BT_WAKEUP_HOST
BT_CLK_REQ
TP710
C3
D5
B3
F4
RFP
TM2
SPIM_CLK
SPIM_CS_N
XIN
XOUT
VREG HV
RST_N
REG_EN
SCL
SDA
LPO_IN
V D D _U S B
V DDTF
RES
VDDPX
VDDRF
D6
2450MHz
VREG
R703
VDDC1
VDDC2
15K
VDDO
V BAT
R702
U701
BCM2070B2KUBXG
GPIO_0
GPIO_6
GPIO_1
GPIO_5
PCM_IN
PCM_OUT
PCM_CLK
PCM_SYNC
UART_TXD
UART_RXD
UART_RTS_N
UART_CTS_N
HUSB_DN
HUSB_DP
C5
B5
TP701
BT_RST_N
C6
D4
E4
C4
A4
C2
D2
F2
E3
TP702
TP703
TP704
TP705
TP706
TP708
TP709
TP707
BT_PCM_OUT
BT_PCM_IN
BT_PCM_CLK
BT_PCM_SYNC
BT_UART_RX
BT_UART_TX
BT_UART_CTS
BT_UART_RTS
B2
A2
F6
F3
E6
D7
B6
A1
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
TP711
- 129 -
7. CIRCUIT DIAGRAM
WIFI
V O U T _L N L D O
V O U T _L N L D O
V D D _3 P 3
V O U T _C B U C K
V D D _C O R E
V D D _3 P 3
V O U T _L N L D O
VDD_3P3
10p
C 802
C801
V O U T _C B U C K
R F _S W _C T R L _R X
VBAT
FB801
120
C826
C 809
C 810
C 811
2.2u
L3
L4
D1
D3
1 .5 u
C 812
4 .7 u
L 802
3 .9 n
2.2u
C806
C807
C808
1u
0.1u
220n
TP803
TP805
TP806
TP808
F5
L6
L5
L7
K6
K7
G6
G5
H6
H7
G7
B4
WR F _ A N A _ V D D 1 P 2
F7
A3
WR F _ L N A _ V D D 1 P 2
WR F _ A F E _ V D D 1 P 2
WR F _ V C O _ L D O _ I N _ V D D 1 P 8
A5
G1
V DDI O_ R F
WR F _ P A _ V D D
WR F _ P A D R V _ V D D
WRF_XTAL_VDD1P2
VDD1
VDD2
VDDIO
RF_SW_CTRL0
RF_SW_CTRL1
RF_SW_CTRL2
RF_SW_CTRL3
VDDIO_SD
EXT_SMPS_REQ
EXT_PWM_REQ
SDIO_DATA_2
SDIO_DATA_0/SPI_MISO
SDIO_DATA_1/SPI_IRQ
SDIO_CLK/SPI_CLK
SDIO_DATA_3/SPI_CSX
SDIO_CMD/SPI_MOSI
U802
GPIO_0
GPIO_3/BTCX_TXCONF
GPIO_4/BTCX_STATUS
GPIO_5/BTCX_RF_ACTIVE
GPIO_1/BTCX_FREQ
JTAG_TMS
JTAG_TDO
JTAG_TDI
JTAG_TCK
JTAG_TRST_L
D4
A6
B2
D2
C6
E2
E6
A4
B7
FB802
C7
VOUT_LNLDO
H2
H3
H4
600
VDD_CORE
0.1u
C816
220n
C819
VDD_IO_1V8
K5
VDD_IO_1V8
J3
K4
E4
R802
0
WL_RST_N
WR F _ G P I O _ O U T
WR F _ V C O _ L D O _ O U T _ V D D 1 P 2
TP802
WRF_TCXO_VDD3P3
WRF_TCXO_IN
XTAL_PU
OSCOUT
OSCIN
EXT_SLEEP_CLK
J4
H5
J6
J7
E5
WLAN_REG_ON
TP804
TP807
TP809
TP810
BTCX_TXCONF
BTCX_STATUS
BTCX_RF_ACTIVE
A7
F6
D6
D7
J5
WLAN_CLK_REQ
C821
100p
XTALP
R803
0
RTC_32K
C4
C5
RF_SW_CTRL_BT
RF_SW_CTRL_RX
RF_SW_CTRL_TX
WR F _ A N A _ G N D
WR F _ V C O _ G N D
WR F _ P A _ G N D 1
WR F _ P A _ G N D 2
WR F _ X T A L _ G N D
WR F _ P A D R V _ G N D
WR F _ A F E _ G N D
WR F _ L N A _ G N D
WR F _ T X
WRF_RES_EXT
P MU _ A V S S
E1
F1
G2
F2
TP801
SPI_MISO
SPI_INT
SPI_CLK
SPI_CS
SPI_MOSI
D5
15K
K2
0.5p
SR_P V SS
R801
C818
G ND1
G ND2
G ND3
G ND4
G ND5
18p
DNI
C820
10p
L2
3.3n
E3
F3
F4
G3
G4
WRF_TX
WRF_RFIN
WRF_RFOUT
V DD_ L DO
V OU T _ C L DO
J1
K1
J2
L1
L803
A1
B1
L804
H1
18p
C817
RF_SW_CTRL_TX
1u
V OU T _ L NL DO1
TX2
GND1
S R _ V DDB A T 1 _ 1
S R _ V DDB A T 1 _ 2
S R _ V DDB A T 2
SR_V L X
RX
C 814
11
10
GND2
U801
ANT XM2400LV-DL1201TMP
EAT61493201
VCTL3
10u
NC2
3
C815
5.6n
VCTL1
VDD
12
15p
V C T L2
TX1
BT_WIFI
39K
NC1
C813
R805
C805
K3
0.1u
RF_SW_CTRL_BT
L 801
4 .7 u
BT_RF
V OU T _ 3 P 3
C803
10p
C822
220n
TCXO LDO
WiFi TCXO
VBAT
VDD_TCXO
VDD_TCXO
100K
C823
R804
2.2u
VOUT
GND
X801
1
2
C824
1u
26MHz
VCC
OUT
3
TG-5010LH-87N
XTALP
WLAN_CLK_REQ
VIN
STBY
PG ND
U803
4
3
GND
NC
2
1
C825
1u
- 130 -
8. BGA
PIN MAP
%*$3,10$37RS9LHZ
BGA IC pin check (U201)
: not in use
- 131 -
* Ball Diagram
(Top View), H9DA2GH1GHMMMR-46M
%DOO'LDJUDP7RS9LHZ+'$*+*+00050
: not in use
- 132 -
9. PCB LAYOUT
9. PCB LAYOUT
C538
C530
U301
F
E
C219
B
A
B
1
C304
C301
TP204
R212
R322
C313
R321
R319
R211
C302
TP805
TP807
C303
TP809
X201
C209
R327
A
10
R803
TP801
C208
TP808
C213
BAT201
C212
TP305
18
TP302
CN201
L401
R210
C312
R202
R204
J
G
L402
R203
R205
L
K
R209
C211
L101
C115
C103
C104
C105
L103
C102
C116
L102
C101
R104
L111
L114
L110
L106
R102
C117
C314
U201
C238
C214
TP802
R201
TP803
L113
TP810
P
N
C237
R408
C404
TP303
C228
C405
TP301
FB201
C114
L108
C218
C810
TP806
C803
L109
C811
TP804
C801
C820
C826
R805
C210
C805
L801
TP304
C307
Q201
C308
C819
C215
C305
C217
C309
C207
C220
C224
C234
C232
C226
C221
C222
C202
C236
C235
C233
C203
C227
H
J
C206
C809
X202
C807
U802
FB801
C306
C216
C229
C821
C812
L201
C201
C802
C231
C230
C816
FB802
X801
C806
C225
R213
C822
C808
R801
R802
C814
L802
C818
L804
D502
C825
U301 : Memory
-no Booting
VB401
L505
C537
C204
C824
CN501
D501
L504
C528
C205
R804
U803
C817
U201 : BB IC
-no Power On.
-no Service.
-no FM Radio
R522
C534
U501
C823
J501
C533
C539
R521
FL101
L112
L107
U101
C106
C107
C108
U101 : Tx Module
-no Service
-RF Sensitivity & TX Power
L105
L104
C111
C109
TP205
TP206
TP207
VA306
C413
R401
R406
R405
1
U401
C411
R302
B
C
C311
R310
R304
VA313
R520
R309
C310
R326
C536
R519
C412
R303
FB401
C418
R308
R410
C535
R515
R518
R517
C527
VA301 VA302
C529
C532
C531
C526
R311
R312
R305
R313
R306
VA304 VA305
R307
R402
C414
R314
R301
R514
ANT103
VA602
R614
VA503
VA502
R424
LD602
C401
ZD401
R613
C410
ZD402
C402
FL401
R612
LD601
LD603
CN401
MIC501
MIC501
-no Voice sending
-no Voice recoding
LG-T395_MAIN_EAX64678601_1.0_TOP
LGE Internal Use Only
- 133 -
9. PCB LAYOUT
ANT102
R107
C113
L138
SW101
L139
ANT101
C110
C112
CN301
C139
R604
R606
C603
R605
C607
40
C606
TP603
F L602
TP602
R602
R610
VA601
21
20
F L601
F L603
CN601
R607
R603
R601
C604
C602
U601
C619
C608
C609
C611
R608
R609
C605
R619
C610
R611
R620
C601
FB601
VA409
R419
CN405
VA402
R421
VA408
R420
TP701
TP709
C416
C508
ZD404
C415
R412
R206
VA406
VA405
VA404
R417
VA403
C618
VA607
VA608
R618
C616
13
C612
C243
R617
R218
VA606
C244
L202
C241
C506
C223
CN404
C613
CN602
C614
C520
12
VA605
R616
C620
VA604
FL605
C323
C316
FL604
C319
VA311
C321
VA308
R318
C617
C317
VA309
R511
C315
R512
C521
R524
ZD504
C320
VA310
R317
VA312
FB506
C524
C318
FB502
C540
24
C522
R413
C507
M501
C514
C513
R215
ZD501
R216
Q202
FB503
R507
C509
C523
C525
C502
VA501
S301
C242
R506
ZD502
ZD201
C501
R214
C239
R505
FB501
L501
C517
R513
R418
R504
R503
ZD503
FB507
C240
C519
R217
C516
R703
R523
ANT701
C505
C714
C518
R501
VA407
C408
CN403
FB504
C709
10
C510
C503
C515
R508
R509
C504
R502
FL701
C409
TP704
VA401
R407
C406
C407
R403
C417
ZD403
TP710
R409
TP707
R705
TP706
TP705
FB701
C707
C705
L803
TP703
C712
R702
C702
C711
Q501
CN402
TP708
F
E
D
C
B
A
FB505
C708
TP711
C701
U801
C815
C706
U701
C704
R704
C813
U701 : BT Module
-no BT connection
C710
C703
TP702
C713
LG-T395_MAIN_EAX64678601_1.0_BOT
LGE Internal Use Only
- 134 -
10.ENGINEERING MODE
Engineering mode is designed to allow a service man/engineer to view and test the basic functions provided
by a handset. The key sequence for switching the engineering mode on is 1809#*350# Select. Pressing END
will switch back to non-engineering mode operation. Use Up and Down key to select a menu and press
select key to progress the test. Pressing back key will switch back to the original testmenu.
[1] BB TEST
[6-2] Backlight
[6-2-1] Backlight On
[1-1-1] BattInfo
[6-3] Audio
[6-3-1] Audio Test
[6-4] Vibrator
[6-4-1] Vibrator On
[1-2-4] BT Test1
[1-2-5] BT Test2
[2] Model Version
[1-2-6] Xhtml Compose Print
[2-1] Version
[1-2-7] Xhtml Print Test
[6-5] LCD
[6-5-1] Auto LCD
[6-6] Key pad
[6-7] Mic Speaker
[6-8] Camera
[6-8-2] Flash On
[3-2-1] Mobility
[3-2-2] RadioRes
[3-3] Layer1 Info
[6-9] FM Radio
[6-8-4] Camera Flash Bunning
[6-9-1] FM Radio Test
[3-5] Memory
[7-1] Automatic
[3o-n6f]i gMuermarGioennConf
[7-2] GSM850
[3-7] MemAllUse
[7-3] EGSM
[3-8] MemDetUse
[7-4] DCS
[3-9] MemDump
[7-5] PCS
- 135 -
10.1
11.1 Introduction
This man
manual
al explains
e plains how
ho to examine
e amine the status
stat s of RX and TX of the model.
model
A. Tx Test
TX test - this is to see if the transmitter of the phones is activating normally.
B. Rx Test
RX test - this is to see if the receiver of the phones is activating normally.
10.2 Setting
11.2
SettingMethod
Method
XZWVX[^
- 136 -
uGj
5. For the purpose of the Standalone Test, Change the Phone to ptest mode and then Click the Reset bar.
6. Select Non signaling in the Quick Bar menu. Then Standalone Test setup is finished.
XZXVX[^
- 137 -
10.3Tx
TxTest
Test
11.3
1. Non signaling mode bar and then confirm OK text in the command line.
2. Put the number of TX Channel in the ARFCN
3. Select Tx in the RF mode menu and PCL in the PA Level menu.
4. Finally, Click Write All bar and try the efficiency test of Phone.
XZYVX[^
- 138 -
11.4
10 4Rx
10.4
RxTest
Test
1. Put the number of RX Channel in the ARFCN.
2. Select Rx in the RF mode menu.
3. Finally, Click Write All bar and try the efficiency test of Phone.
4. The Phone must be changed normal mode after finishing Test.
5. Change the Phone to normal mode and then Click the Reset bar.
XZZVX[^
- 139 -
XZ[VX[^
- 140 -
12.AUTO CALIBRATION
11. AUTO CALIBRATION
12.AUTO
11.
AUTOCALIBRATION
CALIBRATION
11 1 Overview
11.1
Overview
O
i
12.1
Auto-cal (Auto Calibration) is the PC side Calibration tool that perform Tx, Rx and Battery
Calibration with Agilent 8960(GSM call setting instrument) and Tektronix PS2521G(Programmable
Power supply).
Auto-cal generates calibration data by communicating with phone and measuring equipment then
write it into calibration data block of flash memory in GSM phone.
12.2
11.2Tachyon
TachyonDirectory
Directory
LGT395/
LGT395
LGT395
LGT395
LGT395
XZ\VX[^
- 141 -
12.AUTO CALIBRATION
11.4
Procedure
12.4 Procedure
1 .Turn on the Phone.
2. /LGE/Tachyon/Tachyon.exe
LGT395
LGT395
XZ]VX[^
- 142 -
12.AUTO CALIBRATION
%NKEM
4. Tachyon Main
LGT395
XZ^VX[^
- 143 -
12.AUTO CALIBRATION
lgT395.gms
lgT395.gms
lgT395.gms
lgT395.gms
lgT395.gms
XZ_VX[^
- 144 -
12.AUTO CALIBRATION
LGT395
click
Click after
setting
XZ`VX[^
- 145 -
12.AUTO CALIBRATION
%NKEM
75$6Q5GTKCN2QTV
5GVVKPI
5GVVKPI
X[WVX[^
- 146 -
12.AUTO CALIBRATION
LGT395
%NKEM
LGT395
LGT395
LGT395
LGT395
&QWDNG%NKEM
LGT395
LGT395
LGT395
LGT395
LGT395
X[XVX[^
- 147 -
12.AUTO CALIBRATION
%NKEM
6GUV5VCTV
LGT395
LGT395
%CNKDTCVKQP #WVQ2#55
LGT395
lgT395.gms + NewFile.grf
X[YVX[^
- 148 -
12.AUTO CALIBRATION
11.5AGC
AGC
12.5
This procedure is for Rx calibration.
In this procedure, We can get RSSI correction value. Set band EGSM and press Start button the
result window will show correction values per every power level and gain code and the same
measure is performed per every frequency.
12.6
11 6APC
11.6
APC
This procedure is for Tx calibration.
In this procedure you can get proper scale factor value and measured power level.
11.7ADC
ADC
12.7
This procedure is for battery calibration
calibration.
You can get main Battery Config Table and temperature Config Table will be reset.
11.8Target
TargetPower
Power
12.8
BAND
GSM 850
EGSM 900
DCS1800
PCS 1900
Description
Low
Middle
High
Channel
128
191
251
Frequency
824.2 MHz
836.8 MHz
848.8 MHz
Max power
32.5 dBm
32.5 dBm
32.5 dBm
Channel
975
37
124
Frequency
880.2 MHz
897.4 MHz
914.8 MHz
Max power
32 5 dBm
32.5
32 5 dBm
32.5
32 5 dBm
32.5
Channel
512
699
885
Frequency
1710.2 MHz
1747.6 MHz
1784.8 MHz
Max power
29.5 dBm
29.5 dBm
29.5 dBm
Channel
512
661
810
Frequency
1850.2 MHz
1880 MHz
1909.8 MHz
Max power
29.5 dBm
29.5 dBm
29.5 dBm
X[ZVX[^
- 149 -
ACQ01
ABM00
MCQ00
MEV00
EAJ00
EAB00
MCQ01
MDS00
MBG00
Location
MBG01
MDS01
EBR00
GMEY00
ACQ00
SJMY00
EAC00
EAX00
MPHY00
EAX01
SUMY00
MCK00
Description
MEV00
Insulator
EAB00
Speaker,Dual Mode
EAJ00
LCD Module
EBD00
MDS00
Gasket
ABM00
Can Assembly,Shield
MBG00
Button
MBG01
Button,Side
ACQ01
Cover Assembly,Front
MCQ00
Damper,Speaker
MCQ01
Damper,LCD
MDS01
Gasket
ACQ00
Cover Assembly,Rear
EAA00
PIFA Antenna,Multiple
MPHY00
Plate,Protector
GMEY00
Screw,Machine
EBR00
PCB Assembly,Main
SJMY00
Motor,DC
EAX01
PCB,Flexible(Power)
SUMY00
Microphone,Condenser
EAX00
PCB,Sidekey
MCK00
Cover,Battery
EAC00
EAA00
- 150 -
13.2 ReplacementParts
<Mechanic component>
Level
LocationNo.
AGQ000000
Phone Assembly
ACQ100400
Cover
Assembly,EMS
ACQ86071901
LGT395.ATCLBK BK:Black -
ACQ003400
Cover
Assembly,Bar
ACQ86113601
MJN061100
Tape,Protect
MJN68155801
MEV00
Insulator
MEV64107701
MDS00
Gasket
ABM00
Can
Assembly,Shield
ABM73757601
MJN061101
Tape,Protect
MJN68081601
MJN061100
Tape,Protect
MJN68081501
MDJ000000
Filter
MDJ63407501
MBG00
Button
MBG01
Button,Side
ABM070300
Can
Assembly,Shield
ABM73797201
MBK070300
Can,Shield
MBK63273801
MHK000000
Sheet
MJN000000
Tape
MJN68171001
Description
PartNumber
Spec
Remark
- 151 -
Level
LocationNo.
ACQ01
Description
PartNumber
Spec
Cover
Assembly,Front
ACQ85989401
MJN000000
Tape
MJN68099901
MJN089300
Tape,Window
MJN68116601
MJB000000
Stopper
MJB62950101
MDJ000000
Filter
MDJ63464901
MCQ049800
Damper,Motor
MCQ074200
Damper,Speaker
MCK032700
Cover,Front
MET099500
INSERT,NUT
MICE0016910
MCQ00
Damper,Speaker
MCQ01
Damper,LCD
MDS01
Gasket
MJN061101
Tape,Protect
MJN68250701
ACQ00
Cover
Assembly,Rear
ACQ85971301
MCR000000
Decor
MJN020800
Tape,Decor
MJN68116901
MDS000000
Gasket
MKC009400
Window,Camera
Remark
- 152 -
Level
LocationNo.
Description
PartNumber
MEZ000900
Label,After Service
MLAB0001102
MCK063300
Cover,Rear
MCQ000000
Damper
MCQ043300
Damper,LCD
MCQ015700
Damper
Connector
MCQ009400
Damper,Camera
MCQ074201
Damper,Speaker
MPHY00
Plate,Protector
GMEY00
Screw,Machine
GMEY0013901
MEZ000000
Label
MLAZ0038301
ANT101
ANT102
Contact
MCIZ0008201
ANT103
Contact
MCIZ0008701
SC202
Can,Shield
MBK63214601
SC201
Can,Shield
MBK63273901
MEV000000
Insulator
MEV64231201
MDS000000
Gasket
MCQ049800
Damper,Motor
MDS000001
Gasket
Spec
Remark
- 153 -
Level
LocationNo.
MEZ002100
Label,Approval
MLAA0062301
AGF000000
Package Assembly
AGF76517808
MAY047100
Box,Master
MBEE0059811
MHR007000
Sleeve,Box
COMPLEX LGT395.ATCLBK ZZ:Without Color LGMHR62313203 T395 TCL BK Sleeve (For TR3W2B UB/Hecho en
China)
MEZ047200
Label,Master Box
MLAJ0003601
MEZ047201
Label,Master Box
MLAJ0004402
MAF086500
Bag,Vinyl
MAY084000
Box,Unit
MAY65497210
MEZ084100
Label,Unit Box
MLAQ0017701
AGJ000000
PALLET ASSY
APLY0002422
MPCY00
Pallet
MPBA00
Damper,Box
MBEC00
Box,Carton
MCCL00
Cap,Box
M01PBZ
Damper
MPBZ00
Damper
MEZ000000
Label
MLAZ0050901
Description
PartNumber
Spec
Remark
- 154 -
Level
LocationNo.
MEZ084101
Label,Unit Box
AAD000000
Addition Assembly
AAD86130501
MCK00
Cover,Battery
Description
PartNumber
Spec
Remark
- 155 -
13.2 ReplacementParts
<Main component>
Description
Level
LocationNo.
PartNumber
Spec
EAB00
Speaker
Dual Mode
EAB62429501
EAJ00
LCD Module
EAJ62130001
EBD00
Touch Window
Assembly
EBD61367001
EAN62416001
EAN011400
IC,Memory
Card,MICRO SD
EAA00
PIFA
Antenna,Multiple
EAA62788401
EAA030101
PIFA Antenna
Bluetooth
EAA62824501
EBR00
PCB Assembly
Main
EBR75681401
EBR071800
PCB Assembly
Main,SMT
EBR75681901
EBR071600
PCB Assembly
Main,SMT Bottom
EBR75682501
C112
Capacitor
Ceramic,Chip
MCH155A0R75C 0.75pF 0.25PF 50V NP0 ECCH0000196 55TO+125C 1005 R/TP - ROHM Semiconductor
KOREA CORPORATION
C708
Inductor
Multilayer,Chip
ELCH0001401
C714
Inductor
Multilayer,Chip
ELCH0001403
- 156 -
Remark
Level
LocationNo.
Description
PartNumber
Spec
ECTH0002002
C406
Capacitor
TA,Conformal
R502
R513
R601
R605
R606
R608
R609
R619
R620
Resistor,Chip
ERHZ0000401
C703
C704
Capacitor
Ceramic,Chip
R218
R504
R616
Resistor,Chip
ERHZ0000402
L501
Inductor,Multilayer,
Chip
ELCH0003842
C408
C702
C706
C707
Capacitor
Ceramic,Chip
MCH153CN103KK 10nF 10% 16V X7R ECCH0000155 55TO+125C 1005 R/TP - ROHM Semiconductor
KOREA CORPORATION
M501
IC,Audio Sub
System
EUSY0420001
FL601
FL602
FL603
FL604
FL605
Filter,EMI/Power
SFEY0013201
U601
IC,Sub PMIC
EUSY0344403
RT9396GQW QFN,24,R/TP,4CH+2LDO,IC,Sub
PMICIC,Sub PMIC RICHTEK TECHNOLOGY
CORP.
ZD201
ZD302
ZD404
ZD501
ZD502
ZD503
ZD504
Diode,TVS
EDTY0012501
- 157 -
Remark
Level
LocationNo.
C315
C316
C317
C323
C407
C417
Capacitor
Ceramic,Chip
ECZH0000830
R503
R526
Resistor,Chip
ERHZ0000445
C604
C608
C609
C611
C619
C621
C622
VA601
Capacitor
Ceramic,Chip
C505
C516
C517
C518
C519
Capacitor
Ceramic,Chip
CL05A225MQ5NSNC 2.2uF 20% 6.3V X5R ECCH0000198 55TO+85C 1005 R/TP . SAMSUNG ELECTROMECHANICS CO., LTD.
R417
R524
R705
Resistor,Chip
ERHZ0000404
C321
C415
C416
C504
C510
C515
C612
C613
C614
Capacitor
Ceramic,Chip
ECZH0003103
C241
C507
C508
C601
C602
C606
Capacitor
Ceramic,Chip
ECZH0001215
C1005X5R1A105KT000F 1uF 10% 10V X5R 55TO+85C 1005 R/TP - TDK KOREA
COOPERATION
C524
C525
Capacitor
Ceramic,Chip
R419
R420
R421
Resistor,Chip
ERHZ0000505
Description
PartNumber
Spec
Remark
- 158 -
Level
LocationNo.
Q202
TR,Bipolar
EQBN0019201
R216
Resistor,Chip
ERHZ0003801
R206
R217
R318
R412
Resistor,Chip
ERHY0000254
R702
Resistor,Chip
ERHZ0000221
VA402
VA404
VA408
VA409
VA604
VA605
VA607
VA608
Varistor
SEVY0004301
U801
Module, FEM(Front
End Module)
EAT61493201
R413
Resistor,Chip
ERHZ0000506
FB504
FB505
FB701
Filter,Bead
SFBH0008101
C502
Capacitor
Ceramic,Chip
CL05C270JB5NNNC 27pF 5% 50V NP0 ECCH0000117 55TO+125C 1005 R/TP 0.5 SAMSUNG ELECTROMECHANICS CO., LTD.
R501
Resistor,Chip
ERHZ0000486
FB502
FB503
FB506
FB507
Filter,Bead
SFBH0008102
R512
Resistor,Chip
ERHZ0000443
C513
C514
C521
C540
Capacitor
Ceramic,Chip
Description
PartNumber
Spec
- 159 -
Remark
Level
LocationNo.
VA401
VA403
Description
PartNumber
Spec
Varistor
SEVY0005202
S301
Card Socket
EAG63211701
C243
C244
C616
C617
C618
C620
Capacitor
Ceramic,Chip
GRM1555C1H7R5D 7.5pF 0.5PF 50V C0G ECCH0010501 55TO+125C 1005 R/TP - MURATA
MANUFACTURING CO.,LTD.
VA308
VA309
VA311
Varistor
SEVY0004001
FB501
FB601
Filter,Bead
SFBH0007102
CN301
Socket,Card
EAG62830201
CN602
Connector,BtoB
ENBY0034201
R107
Resistor,Chip
EBC61835701
C815
Inductor
Multilayer,Chip
ELCH0003836
CN403
Connector,BtoB
ENBY0051001
C110
R703
Inductor
Multilayer,Chip
ELCH0003826
R506
R507
Resistor,Chip
ERHZ0000488
C607
Capacitor
Ceramic,Chip
- 160 -
Remark
Level
LocationNo.
R418
R604
R610
R611
PartNumber
Spec
Resistor,Chip
ERHZ0000406
Q501
FET
EBK61952101
C523
C603
C605
C610
C701
C705
Capacitor
Ceramic,Chip
GRM188R61A225K 2.2uF 10% 10V X5R ECCH0005603 55TO+85C 1608 R/TP - MURATA
MANUFACTURING CO.,LTD.
R215
Resistor,Chip
ERHZ0000531
R409
R528
Resistor,Chip
ERHZ0000204
C520
C522
Capacitor
Ceramic,Chip
GRM155R71C223K 22nF 10% 16V X7R ECCH0000179 55TO+85C 1005 R/TP - MURATA
MANUFACTURING CO.,LTD.
C501
C506
C509
C711
C712
Capacitor
Ceramic,Chip
C813
Capacitor
Ceramic,Chip
R407
Resistor,Chip
ERHZ0000206
C409
Capacitor
Ceramic,Chip
CL05A225MP5NSNC 2.2uF 20% 10V X5R ECCH0007804 55TO+85C 1005 R/TP 0.5MM SAMSUNG
ELECTRO-MECHANICS CO., LTD.
C240
C242
Capacitor
Ceramic,Chip
ECZH0001217
CN601
Connector,BtoB
ENBY0036001
R617
R618
Resistor,Chip
ERHY0003301
Description
Remark
- 161 -
Level
LocationNo.
Description
PartNumber
Spec
C503
Capacitor
Ceramic,Chip
CL10A106MP8NNNC 10uF 20% 10V X5R ECCH0007803 55TO+85C 1608 R/TP 0.8MM SAMSUNG
ELECTRO-MECHANICS CO., LTD.
R508
R509
Resistor,Chip
ERHZ0000348
R525
Resistor,Chip
ERHZ0000407
R527
Resistor,Chip
ERHZ0000483
VA407
Varistor
SEVY0004101
U502
IC,Comparator
EUSY0250501
NCS2200SQ2T2G NCS2200SQ2T2G,SC70,5
PIN,R/TP,Comparator,pin compatible to
EUSY0077701 - - SC70 R/TP 5P - ON
SEMICONDUCTOR
R403
Resistor,Chip
ERHZ0000295
C139
Inductor
Multilayer,Chip
ELCH0003847
C239
Capacitor
Ceramic,Chip
C1005X7R1H331KT000F 0.33nF 10% 50V X7R ECCH0000137 55TO+125C 1005 R/TP - TDK KOREA
COOPERATION
VA501
Diode,TVS
EDTY0010501
C541
Capacitor
Ceramic,Chip
U701
IC,Bluetooth
EUSY0418701
R214
Resistor,Chip
ERHZ0000449
SFDY0003001
DEA202450BT-1275A1 DEA202450BT1275A1,2450
MHz,2.0*1.25*1.05,SMD,2400M~2500M,IL
1.6,4pin,U-U,50-50,BT BPF TDK CORPORATION
FL701
Filter,Dielectric
Remark
- 162 -
Level
LocationNo.
CN402
PartNumber
Spec
Connector
Terminal Block
EAG63254401
L202
Inductor
Multilayer,Chip
ELCH0003839
SW101
Connector,RF
C710
Capacitor
Ceramic,Chip
ECZH0000813
R511
Resistor,Chip
ERHZ0000529
EBR071700
PCB Assembly
Main,SMT Top
EBR75682801
EAX010001
PCB,Main
EAX64678601
VA502
VA503
Varistor
SEVY0007901
R408
Resistor,Chip
ERHZ0000749
C714
Inductor
Multilayer,Chip
ELCH0001403
L804
Inductor
Multilayer,Chip
ELCH0003815
R502
R513
R601
R605
R606
R608
R609
R619
R620
Resistor,Chip
ERHZ0000401
Description
- 163 -
Remark
Level
LocationNo.
Description
PartNumber
Spec
TSX- 3225 TSX- 3225 TSX- 3225,26 MHz,10
PPM,8 pF,40 ohm,SMD ,32X25X0.6 ,X-Tal (Infinion
chip), Pb-Free EPSON TOYOCOM CORP EPSON
TOYOCOM CORP
X201
Crystal
EXXY0025701
C529
C532
Capacitor
Ceramic,Chip
MCH153CN333KK 33nF 10% 16V X7R ECCH0000161 55TO+125C 1005 R/TP - ROHM Semiconductor
KOREA CORPORATION
C604
C608
C609
C611
C619
C621
C622
VA601
Capacitor
Ceramic,Chip
C321
C415
C416
C504
C510
C515
C612
C613
C614
Capacitor
Ceramic,Chip
ECZH0003103
LD601
LD602
LD603
LED,Chip
EDLH0015103
C406
Capacitor
TA,Conformal
ECTH0002002
ZD201
ZD302
ZD404
ZD501
ZD502
ZD503
ZD504
Diode,TVS
EDTY0012501
R203
Resistor,Chip
ERHZ0000475
C401
C412
Capacitor
Ceramic,Chip
EAE62505701
CL10A105KB8NNNC 1uF 10% 50V X5R 55TO+85C 1608 R/TP 0.9T max. SAMSUNG
ELECTRO-MECHANICS CO., LTD.
C221
Capacitor
Ceramic,Chip
ECZH0025502
GRM219R60J226M 0.000022F 20% 6.3V X5R 55TO+85C 2012 R/TP 0.85MM MURATA
MANUFACTURING CO.,LTD.
- 164 -
Remark
Level
LocationNo.
FB201
Filter,Bead
SFBH0007103
C513
C514
C521
C540
Capacitor
Ceramic,Chip
D501
D502
Diode,TVS
EDTY0012101
C524
C525
Capacitor
Ceramic,Chip
R418
R604
R610
R611
Resistor,Chip
ERHZ0000406
FB504
FB505
FB701
Filter,Bead
SFBH0008101
R308
R309
R310
R311
R312
R313
Resistor,Chip
ERHZ0000490
C523
C603
C605
C610
C701
C705
Capacitor
Ceramic,Chip
GRM188R61A225K 2.2uF 10% 10V X5R ECCH0005603 55TO+85C 1608 R/TP - MURATA
MANUFACTURING CO.,LTD.
C408
C702
C706
C707
Capacitor
Ceramic,Chip
MCH153CN103KK 10nF 10% 16V X7R ECCH0000155 55TO+125C 1005 R/TP - ROHM Semiconductor
KOREA CORPORATION
R302
R303
R304
R305
R306
R319
R321
Resistor,Chip
ERHZ0000405
C240
C242
Capacitor
Ceramic,Chip
ECZH0001217
Description
PartNumber
Spec
Remark
- 165 -
Level
LocationNo.
Description
PartNumber
Spec
VA301
VA302
VA304
VA305
Varistor
SEVY0003801
R202
R307
Resistor,Chip
ERHZ0000484
C710
Capacitor
Ceramic,Chip
ECZH0000813
C207
C210
C236
C808
C816
C822
Capacitor
Ceramic,Chip
ECZH0001216
C1005X5R1A224KT000E 220nF 10% 10V X5R 55TO+85C 1005 R/TP - TDK KOREA
COOPERATION
R617
R618
Resistor,Chip
ERHY0003301
L401
L402
Inductor
Multilayer,Chip
ELCH0003825
C501
C506
C509
C711
C712
Capacitor
Ceramic,Chip
U301
IC,MCP,NAND
EAN61927501
U501
IC,Proximity
EUSY0376201
GP2AP002S00F GP2AP002S00F
GP2AP002S00F,,8 ,R/TP , SHARP
CORPORATION. SHARP CORPORATION.
FB502
FB503
FB506
FB507
Filter,Bead
SFBH0008102
VA402
VA404
VA408
VA409
VA604
VA605
VA607
VA608
Varistor
SEVY0004301
- 166 -
Remark
Level
LocationNo.
C703
C704
Capacitor
Ceramic,Chip
L802
Inductor
Multilayer,Chip
ELCH0001057
VA308
VA309
VA311
Varistor
SEVY0004001
R417
R524
R705
Resistor,Chip
ERHZ0000404
X801
Oscillator,TCXO
EXST0001901
C607
Capacitor
Ceramic,Chip
C301
C306
Capacitor
Ceramic,Chip
ECCH0006201
C1608X5R0J475KT000N 4.7uF 10% 6.3V X5R 55TO+85C 1608 R/TP - TDK CORPORATION
C241
C507
C508
C601
C602
C606
Capacitor
Ceramic,Chip
ECZH0001215
C1005X5R1A105KT000F 1uF 10% 10V X5R 55TO+85C 1005 R/TP - TDK KOREA
COOPERATION
J501
Jack,Phone
EAG63234901
L201
Inductor,Wire
Wound,Chip
ELCP0009410
R402
Resistor,Chip
ERHZ0000203
R512
Resistor,Chip
ERHZ0000443
R612
R613
R614
Resistor,Chip
ERHY0008207
Description
PartNumber
Spec
- 167 -
Remark
Level
LocationNo.
C219
Capacitor
Ceramic,Chip
ECZH0001210
C114
C818
L105
L109
Capacitor
Ceramic,Chip
ECZH0001002
C1005CH1H0R5BT000F 0.5pF 0.1PF 50V NP0 55TO+125C 1005 R/TP - TDK KOREA
COOPERATION
U401
IC,Mini ABB
EAN62339701
C212
C213
Capacitor
Ceramic,Chip
ECCH0002002
C1005X7R1A473KT000F 47000pF 10% 10V Y5P 30TO+85C 1005 R/TP - TDK CORPORATION
C315
C316
C317
C323
C407
C417
Capacitor
Ceramic,Chip
ECZH0000830
C502
Capacitor
Ceramic,Chip
CL05C270JB5NNNC 27pF 5% 50V NP0 ECCH0000117 55TO+125C 1005 R/TP 0.5 SAMSUNG ELECTROMECHANICS CO., LTD.
L107
Inductor
Multilayer,Chip
ELCH0001408
C526
Capacitor
TA,Conformal
ECTH0001902
CN401
Connector,I/O
EAG63149901
R205
Resistor,Chip
ERHZ0000499
C805
Capacitor
Ceramic,Chip
CL05A106MQ5NUNC 10uF 20% 6.3V X5R ECCH0007805 55TO+85C 1005 R/TP - SAMSUNG ELECTROMECHANICS CO., LTD.
Description
PartNumber
Spec
- 168 -
Remark
Level
LocationNo.
FL101
Filter,Saw,Dual
EAM62290001
SAKEX881MAN0F00R14
881.5/942.5/1842.5/1960MHz 1.8*1.4*0.6 SMD
R/TP 10P MURATA MANUFACTURING CO.,LTD.
L111
L114
Inductor
Multilayer,Chip
ELCH0003824
R409
R528
Resistor,Chip
ERHZ0000204
BAT201
Capacitor
Assembly
FB801
Filter,Bead
SFBH0007101
C211
C224
Capacitor
Ceramic,Chip
CL05B472KB5NNNC 4.7nF 10% 25V X7R ECCH0000151 55TO+125C 1005 R/TP - SAMSUNG ELECTROMECHANICS CO., LTD.
C826
Capacitor
Ceramic,Chip
ECCH0002001
C1005JB0J104KT000F 0.1uF 10% 6.3V Y5P 30TO+85C 1005 R/TP - TDK CORPORATION
U101
Module,Tx Module
EAT61713801
Q201
TR,Bipolar
EQBN0020501
R218
R504
R616
Resistor,Chip
ERHZ0000402
C503
Capacitor
Ceramic,Chip
CL10A106MP8NNNC 10uF 20% 10V X5R ECCH0007803 55TO+85C 1608 R/TP 0.8MM SAMSUNG
ELECTRO-MECHANICS CO., LTD.
C538
Capacitor
Ceramic,Chip
GRM188R60J106M 10000000
ECCH0005604 pF,6.3V,M,X5R,TC,1608,R/TP,0.8 mm MURATA
MANUFACTURING CO.,LTD.
C813
Capacitor
Ceramic,Chip
Description
PartNumber
Spec
Remark
- 169 -
Level
LocationNo.
C109
Inductor
Multilayer,Chip
ELCH0003832
C237
C402
C410
Capacitor
Ceramic,Chip
R102
Resistor,Chip
ERHZ0000410
U802
IC Assembly
EUSY0434401
BCM43362SKUBG BCM43362SKUBG
BROADCOM ASIA DISTRIBUTION PTE LTD
R805
Resistor,Chip
ERHZ0000476
U201
IC,Digital
Baseband
Processor,GSM
EUSY0429401
FL401
Filter,EMI/Power
SFEY0015301
X202
Crystal
EXXY0026801
U803
IC,LDO Voltage
Regulator
EUSY0407101
R407
Resistor,Chip
ERHZ0000206
C802
C812
Capacitor
Ceramic,Chip
CL10A475KP8NNNC 4.7uF 10% 10V X5R ECCH0007802 55TO+85C 1608 R/TP - SAMSUNG ELECTROMECHANICS CO., LTD.
R301
Resistor,Chip
ERHZ0000487
C139
Inductor
Multilayer,Chip
ELCH0003847
L801
Inductor,Wire
Wound,Chip
ELCP0012801
Description
PartNumber
Spec
Remark
- 170 -
Level
LocationNo.
R702
Resistor,Chip
ERHZ0000221
C533
Capacitor
Ceramic,Chip
CL05A475MQ5NRNC 4.7uF 20% 6.3V X5R ECCH0017601 55TO+85C 1005 R/TP 0.5MM SAMSUNG
ELECTRO-MECHANICS CO., LTD.
R501
Resistor,Chip
ERHZ0000486
L112
Inductor
Multilayer,Chip
ELCH0004718
SAD010000
Software,Mobile
SAD33309401
EBR071500
PCB Assembly
Main,Insert
EBR75751201
SJMY00
Motor,DC
SJMY0007104
EAX01
PCB
Flexible(Power)
EAX64733401
EBP000000
CAMERA
SVCY0027001
SUMY00
Microphone,Conde
nser
SUMY0003816
RAA050100
Resin,PC
EAX00
PCB,Sidekey
EAX64733301
Description
PartNumber
Spec
Remark
- 171 -
13.3 Accessory
Level
LocationNo.
AFN053800
PartNumber
Spec
Manual Assembly
Operation
AFN75742602
MFL053800
Manual,Operation
MFL67525201
MBM062600
Card,Quick
Reference
MBM062601
Card,Quick
Reference
MBM63645301
MBM087200
Card,Warranty
MCDF0007501
EAY060000
Adapters
EAY62389701
Rechargeable
Battery,Lithium Ion
EAC61700101
Earphone,Stereo
SGEY0003219
EAC00
EAB010200
Description
- 172 -
Remark